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From: Guodong Xu <guodong@riscstar.com>
To: Jonathan Corbet <corbet@lwn.net>, Paul Walmsley <pjw@kernel.org>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Alexandre Ghiti <alex@ghiti.fr>,
	Conor Dooley <conor.dooley@microchip.com>,
	 Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>,  Yixun Lan <dlan@gentoo.org>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
	 Junhui Liu <junhui.liu@pigmoral.tech>,
	linux-doc@vger.kernel.org,  linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org,  devicetree@vger.kernel.org,
	sophgo@lists.linux.dev,  spacemit@lists.linux.dev,
	Guodong Xu <guodong@riscstar.com>
Subject: [PATCH 1/2] Documentation: riscv: uabi: Clarify ISA spec version for canonical order
Date: Tue, 13 Jan 2026 15:45:53 +0800	[thread overview]
Message-ID: <20260113-adding-b-dtsi-v1-1-22d6e55d19df@riscstar.com> (raw)
In-Reply-To: <20260113-adding-b-dtsi-v1-0-22d6e55d19df@riscstar.com>

Specify that chapter 27 refers to version 20191213 of the RISC-V ISA
Unprivileged Architecture. The chapter numbering differs across
specification versions - for example, in version 20250508, the ISA
Extension Naming Conventions is chapter 36, not chapter 27.

Historical versions of the RISC-V specification can be found via Link [1].

Link: https://riscv.org/specifications/ratified/ [1]
Fixes: f07b2b3f9d47 ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
 Documentation/arch/riscv/uabi.rst | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/arch/riscv/uabi.rst b/Documentation/arch/riscv/uabi.rst
index 243e40062e34ed5057e3e79ad61311f94b7dd404..0c5299e007622a123d64cfd36ac1491b22d4255b 100644
--- a/Documentation/arch/riscv/uabi.rst
+++ b/Documentation/arch/riscv/uabi.rst
@@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo
 ------------------------------------
 
 The canonical order of ISA extension names in the ISA string is defined in
-chapter 27 of the unprivileged specification.
+Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
+(Document Version 20191213).
+
 The specification uses vague wording, such as should, when it comes to ordering,
 so for our purposes the following rules apply:
 

-- 
2.43.0


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  reply	other threads:[~2026-01-13  7:46 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-13  7:45 [PATCH 0/2] riscv: dts: Add "b" ISA extension to existing devicetrees Guodong Xu
2026-01-13  7:45 ` Guodong Xu [this message]
2026-01-14 19:22   ` [PATCH 1/2] Documentation: riscv: uabi: Clarify ISA spec version for canonical order Paul Walmsley
2026-01-14 20:41     ` Conor Dooley
2026-01-13  7:45 ` [PATCH 2/2] riscv: dts: Add "b" ISA extension to existing devicetrees Guodong Xu
2026-01-13  7:53   ` Yixun Lan
2026-01-14  2:33     ` Guodong Xu
2026-01-14 20:42       ` Conor Dooley
2026-01-14 22:54         ` Guodong Xu

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