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From: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
To: Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Will Deacon <will@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Boqun Feng <boqun.feng@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>, Gary Guo <gary@garyguo.net>,
	Yury Norov <yury.norov@gmail.com>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	cfu@wavecomp.com, torvalds@linux-foundation.org, olof@lixom.net,
	aleksa.paunovic@htecgroup.com, arikalo@gmail.com
Cc: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Vladimir.Kondratiev@mobileye.com
Subject: [PATCH v2 2/2] riscv: more accurate check for CPU atomics support
Date: Tue, 20 Jan 2026 16:26:24 +0200	[thread overview]
Message-ID: <20260120-lrsc-only-v2-2-a522e640d27d@mobileye.com> (raw)
In-Reply-To: <20260120-lrsc-only-v2-0-a522e640d27d@mobileye.com>

CPU reports extensions supported in "riscv,isa-extensions" property
of the CPU node, for atomic operations it is
- "a" extension meaning both AMO and LR/SC supported
- "zaamo" extension meaning AMO instructions supported
- "zalrsc" extension meaning LR/SC supported

Code can also be compiled with subset of atomics support

Relax requirements for CPU extension support from full "a"
to subset compatible with software configuration

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
---
 arch/riscv/kernel/cpu.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 3dbc8cc557dd1d71101959a003ea7195af3c92a0..84d4a549b6136e0c97a35025a18ce710afbedad5 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -82,12 +82,26 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo
 		return -ENODEV;
 
 	if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||
-	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||
-	    of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {
-		pr_warn("CPU with hartid=%lu does not support ima", *hart);
+	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0) {
+		pr_warn("CPU with hartid=%lu does not support im", *hart);
 		return -ENODEV;
 	}
-
+	/* any atomic supported? */
+#if defined(__riscv_atomic) || defined(__riscv_zaamo)
+	if (of_property_match_string(node, "riscv,isa-extensions", "a") < 0 &&
+	    of_property_match_string(node, "riscv,isa-extensions", "zaamo") < 0) {
+		pr_warn("CPU with hartid=%lu does not support AMO atomics", *hart);
+		return -ENODEV;
+	}
+#elif defined(__riscv_zalrsc)
+	if (of_property_match_string(node, "riscv,isa-extensions", "a") < 0 &&
+	    of_property_match_string(node, "riscv,isa-extensions", "zalrsc") < 0) {
+		pr_warn("CPU with hartid=%lu does not support LS/SC atomics", *hart);
+		return -ENODEV;
+	}
+#else
+#error "need atomic or zalrsc extension"
+#endif
 	return 0;
 
 old_interface:

-- 
2.43.0


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  parent reply	other threads:[~2026-01-20 14:27 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-14  7:25 [PATCH] riscv: support CPUs having only "zalrsc" but no "zaamo" Vladimir Kondratiev
2026-01-17  1:50 ` Paul Walmsley
2026-01-19  7:29   ` Vladimir Kondratiev
2026-01-19 17:17     ` Gary Guo
2026-01-19 17:40       ` Linus Torvalds
2026-01-20 14:26       ` [PATCH v2 0/2] Support for Risc-V CPUs implementing LR/SC but not AMO Vladimir Kondratiev
2026-01-20 14:26         ` [PATCH v2 1/2] riscv: support ISA extensions "zaamo" and "zalrsc" Vladimir Kondratiev
2026-01-20 14:26         ` Vladimir Kondratiev [this message]
2026-01-21 18:19         ` [PATCH v2 0/2] Support for Risc-V CPUs implementing LR/SC but not AMO Paul Walmsley
2026-04-08 11:50           ` Aleksa Paunovic

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