Re: [PATCH v2 1/5] iommupt: Add the RISC-V page table format

From: Jason Gunthorpe <jgg@nvidia.com>
To: Andrew Jones <andrew.jones@oss.qualcomm.com>
Cc: Alexandre Ghiti <alex@ghiti.fr>,
	Albert Ou <aou@eecs.berkeley.edu>,
	iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-riscv@lists.infradead.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <pjw@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Jeznach <tjeznach@rivosinc.com>,
	Will Deacon <will@kernel.org>,
	lihangjing@bytedance.com, Xu Lu <luxu.kernel@bytedance.com>,
	patches@lists.linux.dev, xieyongji@bytedance.com
Subject: Re: [PATCH v2 1/5] iommupt: Add the RISC-V page table format
Date: Fri, 30 Jan 2026 19:47:18 -0400	[thread overview]
Message-ID: <20260130234718.GL2223369@nvidia.com> (raw)
In-Reply-To: <hay56yg2plriyehsvy6zbyaptf6xvnj65zzvurllvpar6gyklr@i4cb6zenwap6>

On Fri, Jan 30, 2026 at 01:21:27PM -0600, Andrew Jones wrote:
> > +config IOMMU_PT_RISCV64
> > +       tristate "IOMMU page table for RISC-V 64 bit Sv57/Sv48/Sv39"
> > +	depends on !GENERIC_ATOMIC64 # for cmpxchg64
> > +	help
> > +	  iommu_domain implementation for RISC-V 64 bit 3/4/5 level page table.
> > +	  It supports 4K/2M/1G/512G/256T page sizes and can decode a sign
> > +	  extended portion of the 64 bit IOVA space.
> > +
> >  	  Selected automatically by an IOMMU driver that uses this format.
> 
> I assume we want to keep this 'Selected automatically...' line in the help
> text of IOMMU_PT_VTDSS too, so it should be duplicated here.

Yeah, it is a rebasing error

Thanks,
Jason

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv