From: cp0613@linux.alibaba.com
To: atish.patra@linux.dev, anup@brainfault.org, alex@ghiti.fr,
pjw@kernel.org, guoren@kernel.org
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Chen Pei <cp0613@linux.alibaba.com>
Subject: [PATCH] drivers/perf: riscv: Keep the fixed counter counting
Date: Sat, 31 Jan 2026 19:24:40 +0800 [thread overview]
Message-ID: <20260131112440.2915-1-cp0613@linux.alibaba.com> (raw)
From: Chen Pei <cp0613@linux.alibaba.com>
The RISC-V SBI PMU driver disables all PMU counters during initialization
via pmu_sbi_stop_all. For fixed counters CYCLE, TIME and INSTRET, this is
unnecessary for the following two reasons:
1. Some kernel driver code may directly read CYCLE and INSTRET to perform
simple performance analysis.
2. In legacy mode, user space directly reads CYCLE and INSTRET. (echo 2 >
/proc/sys/kernel/perf_user_access)
Therefore, We keep counting CYCLE, TIME and INSTRET.
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
---
drivers/perf/riscv_pmu_sbi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 7dd282da67ce..93aaab324443 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -899,6 +899,9 @@ static int pmu_sbi_get_ctrinfo(int nctr, unsigned long *mask)
static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
{
+ /* We keep counting CYCLE, TIME and INSTRET. */
+ pmu->cmask &= ~0x7;
+
/*
* No need to check the error because we are disabling all the counters
* which may include counters that are not enabled yet.
--
2.50.1
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next reply other threads:[~2026-01-31 11:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-31 11:24 cp0613 [this message]
2026-02-04 9:17 ` [PATCH] drivers/perf: riscv: Keep the fixed counter counting Atish Patra
2026-02-04 13:13 ` qingwei hu
2026-02-08 9:32 ` Atish Patra
2026-02-09 11:16 ` [External] " Qingwei Hu
2026-02-09 12:36 ` cp0613
2026-03-28 3:57 ` Atish Patra
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