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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Han, On 00:54 Fri 03 Apr , Han Gao wrote: > Enable the DWC3 USB 3.0 controller and its associated usbphy2 on the > OrangePi RV2 board. > > The board utilizes a Genesys Logic GL3523 USB3.0 hub. > > Define a 3.3v fixed voltage regulator for PCIe and enable PCIe and > PHY-related Device Tree nodes for the OrangePi RV2. > > Co-developed-by: Chukun Pan > Signed-off-by: Chukun Pan > Signed-off-by: Han Gao > --- > .../boot/dts/spacemit/k1-orangepi-rv2.dts | 80 +++++++++++++++++++ > 1 file changed, 80 insertions(+) > > diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts > index a6de3753b876..c19952e70c31 100644 > --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts > +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts > @@ -23,6 +23,15 @@ chosen { > stdout-path = "serial0"; > }; > > + pcie_vcc_3v3: regulator-pcie-vcc3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "pcie_vcc3v3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio K1_GPIO(116) GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > vcc_5v0: regulator-vcc-5v0 { > compatible = "regulator-fixed"; > regulator-name = "vcc_5v0"; > @@ -42,6 +51,16 @@ vcc4v0: regulator-vcc4v0 { > vin-supply = <&vcc_5v0>; > }; > > + vcc5v0_usb30: regulator-vcc5v0-usb30 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_usb30"; > + enable-active-high; > + gpios = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc_5v0>; > + }; > + > leds { > compatible = "gpio-leds"; > > @@ -54,6 +73,10 @@ led1 { > }; > }; > > +&combo_phy { > + status = "okay"; > +}; > + > ð0 { > phy-handle = <&rgmii0>; > phy-mode = "rgmii-id"; > @@ -200,8 +223,65 @@ dldo6 { > }; > }; > > +&pcie1_phy { > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie1_3_cfg>; > + status = "okay"; > +}; > + > +&pcie1_port { > + phys = <&pcie1_phy>; > + vpcie3v3-supply = <&pcie_vcc_3v3>; > +}; > + > +&pcie1 { > + vpcie3v3-supply = <&pcie_vcc_3v3>; > + status = "okay"; > +}; > + > +&pcie2_phy { > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie2_4_cfg>; > + status = "okay"; > +}; > + > +&pcie2_port { > + phys = <&pcie2_phy>; > + vpcie3v3-supply = <&pcie_vcc_3v3>; > +}; > + > +&pcie2 { > + vpcie3v3-supply = <&pcie_vcc_3v3>; > + status = "okay"; > +}; > + > &uart0 { > pinctrl-names = "default"; > pinctrl-0 = <&uart0_2_cfg>; > status = "okay"; > }; > + > +&usbphy2 { > + status = "okay"; > +}; > + > +&usb_dwc3 { > + dr_mode = "host"; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; Can you put vbus-supply here? see Chukun's patch http://lore.kernel.org/r/20260402100007.110201-4-amadeus@jmu.edu.cn > + > + hub_2_0: hub@1 { > + compatible = "usb5e3,610"; > + reg = <0x1>; > + peer-hub = <&hub_3_0>; .. > + vdd-supply = <&vcc5v0_usb30>; I think the vdd is vcc_5v0, while vcc5v0_usb30 is the vbus, if we check page 16 of RV2 schematics, GL3523-QFN75 (USB HUB)'s pin V5, VDDP directly connect to VCC_5V0 > + }; > + > + hub_3_0: hub@2 { > + compatible = "usb5e3,620"; > + reg = <0x2>; > + peer-hub = <&hub_2_0>; > + vdd-supply = <&vcc5v0_usb30>; > + }; > +}; > -- > 2.47.3 > > -- Yixun Lan (dlan) _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv