From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86D75ED7BBC for ; Tue, 14 Apr 2026 11:02:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=p3Ab1xWAzzOLI/roniPKywcClUHEg25TXmZ0mVqbPt8=; b=TI6jzlhXzF8/PP 7XjkOx/8t1d3OOD+EvZ7HMF2xq+ImHFop9JDr0WeTu0PQrJtdRIbhmueREpbXXqNQ3+BeJh51ciXt hTcx+wk3ywogVxIbxb+z1t9l/CAVyJ6YowX0ozajpjMgMDFyyEanAecXHJsKqbP9YqbPMZU4AvGe9 7klMCf2TbfcGckGuI96M1kRqE3fob9at5wL/ArnyWBi1WLFoMnvLljhl3GsA4C/xREdG3qUlO/1Sg 6iq2AIQKld3T+6HkHrwYFyCndcXuxdibOBC++KKYPHIzP+h7+AJXwEAmdhqkrcc7EHFwAUUkJO5Ix U6Mz7lId8LJGrAgkTDUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1wCbXJ-0000000HBnR-1lFv; Tue, 14 Apr 2026 11:02:29 +0000 Received: from out30-118.freemail.mail.aliyun.com ([115.124.30.118]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1wCbXE-0000000HBlU-3nPW; Tue, 14 Apr 2026 11:02:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1776164541; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=nQO0WEe8PRJEZNBo6ma9yL1pusW/StlSU4Ir3Mof4CQ=; b=rD6WN/6UcaT0Jp9LJSmXv7CBbnTqayydixUytro38OtACv5XXWyf9d/xNBySsdyfhu54jYEeCRWR2b0wdvoWzRKorntmZFhwXON0hAfVx6u/EUUCmKI0XXP1nj4skpncokk8xsVP/NcPMnH/PLhwQyDGm2sULESbk4QPEUD6WQg= X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R751e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033045098064;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0X11DRSf_1776164534; Received: from localhost.localdomain(mailfrom:fangyu.yu@linux.alibaba.com fp:SMTPD_---0X11DRSf_1776164534 cluster:ay36) by smtp.aliyun-inc.com; Tue, 14 Apr 2026 19:02:16 +0800 From: fangyu.yu@linux.alibaba.com To: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, tjeznach@rivosinc.com, jgg@ziepe.ca, kevin.tian@intel.com, baolu.lu@linux.intel.com, vasant.hegde@amd.com, anup@brainfault.org, nutty.liu@hotmail.com, jgg@nvidia.com Cc: guoren@kernel.org, iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Fangyu Yu Subject: [PATCH v2 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt Date: Tue, 14 Apr 2026 19:02:10 +0800 Message-Id: <20260414110212.79526-1-fangyu.yu@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260414_040225_493866_3A8A4D75 X-CRM114-Status: UNSURE ( 4.92 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Fangyu Yu RISC-V Svpbmt adds page-based memory types (PBMT) to PTEs, allowing mappings to be tagged as e.g. normal memory, non-cacheable memory, or I/O. This series wires the RISC-V IOMMU Svpbmt capability into generic_pt and uses PBMT to encode device memory attributes for IOMMU mappings. This series builds on top of the new RISC-V IOMMU page table patches: https://patch.msgid.link/r/0-v3-9dbf0a72a51c+302-iommu_pt_riscv_jgg@nvidia.com --- Changes in v2: - Add a comment for PT_FEAT_RISCV_SVPBMT (per Kevin and Jason). - Clarify PBMT encoding condition, sort PBMT-related bits by position, and drop the redundant PBMT clear(per Kevin). - Link to v1: https://lore.kernel.org/linux-iommu/20260411022223.91029-1-fangyu.yu@linux.alibaba.com/ Fangyu Yu (2): iommu/riscv: Advertise Svpbmt support to generic page table iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits drivers/iommu/generic_pt/fmt/riscv.h | 8 ++++++++ drivers/iommu/riscv/iommu.c | 2 ++ include/linux/generic_pt/common.h | 4 ++++ 3 files changed, 14 insertions(+) -- 2.50.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv