From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A1AACD3442 for ; Thu, 7 May 2026 11:37:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zJB6MhCb5GlOvVAVD1hTao98vedsdJ+8V/2ktGPdV6w=; b=CzDJYBfLcMhMxt bu4ftD9r11BjkoyA0DK5hAjn7ApSSWzSz5C6XZmKvnaitrS/E5bPGcsMw/v1b39UTa7y77fzLd2dc K3GpvBrC2YNPaUC/F+1mWIdFeoFc7g8cPD7a6K+/kzUVqnXny55pQCWTniWeMCckd9Ghr+OX5HGs3 gCmg0wPwYy2qeVY4t/hTWEQDMmmfo6P3FTbjO+6MPnXRCHBM+/tNkT3VAqu8l5eHgQFMqEaycx89v JcQ1ah7YROQbHibGHBx14vqAki7tZgLJLBXtOC7aUaleeLapoElEAkvtjXWEeWLAGVtttWbVp0axT DnBM4nX035cP4j+MYMHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wKx2k-00000003edm-2PdS; Thu, 07 May 2026 11:37:26 +0000 Received: from out30-100.freemail.mail.aliyun.com ([115.124.30.100]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wKx2g-00000003ebX-2KxA; Thu, 07 May 2026 11:37:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1778153840; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=e4f5X+R7i8qSI7NXq8cp591M8sz5EYh7qAQjjFxZJsY=; b=tuc9/fzbc86Ufy17lcS2w0uQsLLAvCx2PbjyYgxY9KUKWVNbTxwdxBFARrJ+kHvPTpFhg5EQO3AEFLSv37m00+HXEyhf8nZgJASIwC8EqL0fdQoKm4/rzqPy28fCLf9r6auBj2eGr0XBzMskB42HOrFlhF3fCv0LRxM5Qy8PCTA= X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R111e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033045098064;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=24;SR=0;TI=SMTPD_---0X2UVF-c_1778153833; Received: from localhost.localdomain(mailfrom:fangyu.yu@linux.alibaba.com fp:SMTPD_---0X2UVF-c_1778153833 cluster:ay36) by smtp.aliyun-inc.com; Thu, 07 May 2026 19:37:14 +0800 From: fangyu.yu@linux.alibaba.com To: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, tjeznach@rivosinc.com, jgg@ziepe.ca, kevin.tian@intel.com, baolu.lu@linux.intel.com, vasant.hegde@amd.com, anup@brainfault.org, atish.patra@linux.dev, skhawaja@google.com, jgg@nvidia.com Cc: guoren@kernel.org, andrew.jones@oss.qualcomm.com, kvm@vger.kernel.org, iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Fangyu Yu Subject: [RFC PATCH v2 02/10] iommupt: Add RISC-V dirty tracking PTE ops Date: Thu, 7 May 2026 19:36:58 +0800 Message-Id: <20260507113706.11400-3-fangyu.yu@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20260507113706.11400-1-fangyu.yu@linux.alibaba.com> References: <20260507113706.11400-1-fangyu.yu@linux.alibaba.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260507_043724_108164_23647959 X-CRM114-Status: UNSURE ( 7.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Fangyu Yu Implement the three dirty-tracking hooks required by the generic page table framework for the RISC-V format: pt_entry_is_write_dirty(): Check the D bit (bit 7) in the PTE. pt_entry_make_write_clean(): Clear the D bit across the full contiguous range. pt_entry_make_write_dirty(): Atomically set D via try_cmpxchg64() on a single PTE. Signed-off-by: Fangyu Yu --- drivers/iommu/generic_pt/fmt/riscv.h | 43 ++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h index 777887335696..866b922f7e13 100644 --- a/drivers/iommu/generic_pt/fmt/riscv.h +++ b/drivers/iommu/generic_pt/fmt/riscv.h @@ -222,6 +222,49 @@ static inline void riscvpt_attr_from_entry(const struct pt_state *pts, } #define pt_attr_from_entry riscvpt_attr_from_entry +/* + * Dirty tracking: RISC-V PTEs use D (bit 7) as the hardware dirty bit. + * When Svnapot 64K is active a leaf entry spans 16 consecutive PTEs; we + * must check / clear all of them so that no dirty indication is lost. + */ +static inline bool riscvpt_entry_is_write_dirty(const struct pt_state *pts) +{ + unsigned int num_contig_lg2 = riscvpt_entry_num_contig_lg2(pts); + const pt_riscv_entry_t *tablep = + pt_cur_table(pts, pt_riscv_entry_t) + + log2_set_mod(pts->index, 0, num_contig_lg2); + const pt_riscv_entry_t *end = tablep + log2_to_int(num_contig_lg2); + + for (; tablep != end; tablep++) + if (READ_ONCE(*tablep) & RISCVPT_D) + return true; + return false; +} +#define pt_entry_is_write_dirty riscvpt_entry_is_write_dirty + +static inline void riscvpt_entry_make_write_clean(struct pt_state *pts) +{ + unsigned int num_contig_lg2 = riscvpt_entry_num_contig_lg2(pts); + pt_riscv_entry_t *tablep = + pt_cur_table(pts, pt_riscv_entry_t) + + log2_set_mod(pts->index, 0, num_contig_lg2); + pt_riscv_entry_t *end = tablep + log2_to_int(num_contig_lg2); + + for (; tablep != end; tablep++) + WRITE_ONCE(*tablep, READ_ONCE(*tablep) & ~(pt_riscv_entry_t)RISCVPT_D); +} +#define pt_entry_make_write_clean riscvpt_entry_make_write_clean + +static inline bool riscvpt_entry_make_write_dirty(struct pt_state *pts) +{ + pt_riscv_entry_t *tablep = + pt_cur_table(pts, pt_riscv_entry_t) + pts->index; + pt_riscv_entry_t new = pts->entry | RISCVPT_D; + + return try_cmpxchg64(tablep, &pts->entry, new); +} +#define pt_entry_make_write_dirty riscvpt_entry_make_write_dirty + /* --- iommu */ #include #include -- 2.50.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv