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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id af79cd13be357-92e90b80785sm11476585a.3.2026.07.02.16.51.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2026 16:51:31 -0700 (PDT) From: Enzo Adriano To: Junhui Liu Cc: Andre Przywara , Brian Masney , Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Richard Cochran , linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jernej Skrabec , Samuel Holland Subject: Re: [PATCH RFC 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Date: Thu, 2 Jul 2026 19:51:18 -0400 Message-ID: <20260702235118.1225793-1-enzo.adriano.code@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260702_165133_386109_B1796CCF X-CRM114-Status: GOOD ( 10.25 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Junhui, Good to hear from you, and glad the series stays in your hands. I hope the move went smoothly. No rush at all from my side, please take whatever time you need to settle in. For whenever you get to v2: I posted register-check notes on five of the patches earlier today, so they are on the list to pick through at your convenience. Take from them whatever is useful and ignore the rest. One offer, entirely take-it-or-leave-it: I have three Cubie A7S boards here with serial consoles attached, and I am eager to put them to use. I can boot v2 the day you post it and report back, if that would save you time. On my side I have Cubie A7S board DTS support staged to follow once the clock and pinctrl pieces land, so whenever v2 arrives it will get exercised on real hardware right away. For transparency: I use AI assistance (Claude Code) for the register comparisons and the test harness, and I check each finding against the manual and vendor sources before posting. Thanks, Enzo _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv