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From: Chen Pei <cp0613@linux.alibaba.com>
To: Guo Ren <guoren@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Zhanpeng Zhang <zhangzhanpeng.jasper@bytedance.com>,
	Tomasz Jeznach <tomasz.jeznach@linux.dev>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	David Laight <david.laight.linux@gmail.com>,
	Vivian Wang <wangruikang@iscas.ac.cn>,
	Zong Li <zong.li@sifive.com>,
	cuiyunhui@bytedance.com, yuanzhu@bytedance.com,
	iommu@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] iommu/riscv: Use 32-bit MMIO accesses for 64-bit registers
Date: Wed, 15 Jul 2026 17:43:00 +0800	[thread overview]
Message-ID: <20260715094305.2783-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <CAJF2gTT7TPA+K+JgkvvUtb0x5BSzfox+s5rG8OtrP0QzPetHFw@mail.gmail.com>

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On Tue, Jul 14, 2026 at 09:55:19PM +0800, Guo Ren wrote:
> The specification is deliberately precise. It uses "may", not "shall"
> or "must". We should not introduce speculative implications that break
> the spec's consistency on RV32. The safe and portable interpretation
> is that software is explicitly allowed to use 32-bit accesses for
> these registers on any system, which is exactly what this patch does.

The RV32 argument is quite compelling. The RISC-V IOMMU is a
platform-level IP that must serve both RV32 and RV64 software stacks.
Mandating 64-bit MMIO accesses would directly conflict with RV32, where
such accesses are impossible — so any interpretation that turns "may be
accessed using either a 32-bit or a 64-bit access" into an implicit
hardware requirement for 64-bit accesses breaks the spec's own
consistency on RV32.

The RFC 2119 argument is equally strong. In RFC 2119 terms, "MAY" means
an item is truly optional — a specification should express obligations
through these well-defined normative keywords, not leave them to be
inferred from everyday-language intuition. If the spec authors had
intended to require hardware to support 64-bit accesses, they would have
said "must" or "shall".

Given both points, treating 32-bit MMIO accesses as the default for the
RISC-V IOMMU driver is the safe, portable, and more inclusive choice: it
is explicitly permitted on every conformant implementation, whereas
64-bit access atomicity is left unspecified.

Acked-by: Chen Pei <cp0613@linux.alibaba.com>

Thanks,
Pei



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      reply	other threads:[~2026-07-15  9:43 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-15  6:48 [PATCH v1] iommu/riscv: Support 32-bit register accesses Zhanpeng Zhang
2026-06-15  8:21 ` Andreas Schwab
2026-06-15  9:51   ` [External] " Zhanpeng Zhang
2026-06-15  9:59 ` David Laight
2026-06-15 13:21   ` [External] " Zhanpeng Zhang
2026-06-15 12:38 ` Guo Ren
2026-06-15 13:23   ` [External] " Zhanpeng Zhang
2026-06-16 10:36   ` David Laight
2026-06-16 15:47     ` Guo Ren
2026-06-16 19:51       ` David Laight
2026-06-17 16:24         ` Guo Ren
2026-06-17 21:54           ` David Laight
2026-06-18  3:36             ` Guo Ren
2026-06-18  3:20   ` Vivian Wang
2026-06-18  3:45     ` Guo Ren
2026-06-18  7:33       ` Vivian Wang
2026-06-18  9:51         ` Guo Ren
2026-06-18 10:01           ` Vivian Wang
2026-06-18 13:36           ` David Laight
2026-06-18 16:40             ` Guo Ren
2026-06-23  9:20               ` Zong Li
2026-06-28  8:20                 ` Guo Ren
2026-06-29  1:15                   ` Zong Li
2026-06-26  9:18               ` Zhanpeng Zhang
2026-07-13  6:09 ` [PATCH v2] iommu/riscv: Use 32-bit MMIO accesses for 64-bit registers Zhanpeng Zhang
2026-07-13  7:00   ` Guo Ren
2026-07-13  8:24     ` Zhanpeng Zhang
2026-07-13 12:29 ` [PATCH v3] " Zhanpeng Zhang
2026-07-14  2:02   ` Guo Ren
2026-07-14  7:10     ` Tomasz Jeznach
2026-07-14 12:27   ` Robin Murphy
2026-07-14 13:24     ` Guo Ren
2026-07-14 14:53       ` David Laight
2026-07-14 16:53         ` Guo Ren
2026-07-14 21:02           ` David Laight
2026-07-15  2:37             ` Guo Ren
2026-07-14 13:55     ` Guo Ren
2026-07-15  9:43       ` Chen Pei [this message]

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