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Sun, 30 Aug 2026 09:12:29 -0700 (PDT) Received: from localhost.localdomain ([134.195.101.83]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-32bdfd03e71sm5719005eec.1.2026.08.30.09.12.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 30 Aug 2026 09:12:28 -0700 (PDT) From: Yu Jin To: linux-riscv@lists.infradead.org Cc: Albert Ou , Alexandre Ghiti , Jonathan Corbet , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Randy Dunlap , Shuah Khan , Yu Jin Subject: [RFC PATCH 1/2] docs: riscv: document the Sv32 virtual memory layout Date: Mon, 31 Aug 2026 00:12:04 +0800 Message-ID: <20260830161205.80162-2-lambda.jinyu@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260830161205.80162-1-lambda.jinyu@gmail.com> References: <20260830161205.80162-1-lambda.jinyu@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260830_091230_571131_2645C886 X-CRM114-Status: GOOD ( 13.81 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The RISC-V virtual memory layout documentation describes the 64-bit paging modes but leaves the Sv32 section as a TODO. Document the rv32_defconfig layout and clarify which boundaries depend on the configured size of struct page. Distinguish the maximum direct-map range from the portion backed by physical memory. Also explain why the 34-bit physical addresses encoded by Sv32 page table entries do not make all of that address space usable as RAM by the current RV32 kernel. Signed-off-by: Yu Jin --- Documentation/arch/riscv/vm-layout.rst | 28 +++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/arch/riscv/vm-layout.rst b/Documentation/arch/riscv/vm-layout.rst index eabec99b5852..8e1447cf574e 100644 --- a/Documentation/arch/riscv/vm-layout.rst +++ b/Documentation/arch/riscv/vm-layout.rst @@ -16,7 +16,33 @@ RISC-V Linux Kernel 32bit RISC-V Linux Kernel SV32 ------------------------ -TODO +Sv32 provides a 4GB virtual address space, with the upper part used by the +kernel. Unlike the 64-bit layouts, the kernel image is part of the direct +mapping. The following layout is produced by ``rv32_defconfig``. + +:: + + ======================================================================================================================== + Start addr | Offset | End addr | Size | VM area description + ======================================================================================================================== + | | | | + 00000000 | 0 | 9c7fffff | 2504 MB | user-space virtual memory, different per mm + __________________|____________|__________________|_________|___________________________________________________________ + | + | Kernel-space virtual memory, shared between all processes: + ____________________________________________________________|___________________________________________________________ + | | | | + 9c800000 | -1592 MB | 9cffffff | 8 MB | fixmap + 9d000000 | -1584 MB | 9dffffff | 16 MB | PCI io + 9e000000 | -1568 MB | 9fffffff | 32 MB | vmemmap-sized reserved area + a0000000 | -1.5 GB | bfffffff | 512 MB | vmalloc/ioremap/modules; BPF JIT uses the last 128 MB + c0000000 | -1 GB | ffffffff | 1 GB | direct mapping of physical memory + __________________|____________|__________________|_________|___________________________________________________________ + +The layout before ``VMALLOC_START`` depends on the configured size of +``struct page``. The direct mapping row shows its maximum range; usable RAM is +limited by its mapped portion and the 32-bit ``phys_addr_t``, despite the +34-bit physical addresses encoded by Sv32 page table entries. RISC-V Linux Kernel 64bit ========================= -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv