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[86.49.251.7]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49b945816f2sm346414945e9.8.2026.08.31.07.59.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 07:59:52 -0700 (PDT) From: Andrew Jones To: linux-riscv@lists.infradead.org, iommu@lists.linux.dev Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev, tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org, tglx@kernel.org, kevin.tian@intel.com, fangyu.yu@linux.alibaba.com Subject: [PATCH v5 05/17] iommufd: Prepare software MSI maps for address lists Date: Mon, 31 Aug 2026 16:59:31 +0200 Message-ID: <20260831145943.313726-6-andrew.jones@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831145943.313726-1-andrew.jones@oss.qualcomm.com> References: <20260831145943.313726-1-andrew.jones@oss.qualcomm.com> MIME-Version: 1.0 X-Authority-Analysis: v=2.4 cv=W6UIkxWk c=1 sm=1 tr=0 ts=6a9596ea cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=on9AXyaqQ0RhfYpiXjjEXA==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=noCGlsY9V4GqTmqY_BAA:9 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-ORIG-GUID: IE0KEMe5ouaWVvBtnpk9zvYv7oASa_IC X-Proofpoint-GUID: IE0KEMe5ouaWVvBtnpk9zvYv7oASa_IC X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDEyOSBTYWx0ZWRfX2amEM0t2qyiY nA/d8ROpJvtPun9frwfZogZJlgI/mTlp+jo3lWhfVnpvVrQi/xaA1IK0XwO/Ey6aArqL+JwM5TN VXtzpStxgrtV4dzDffcUU1zdoghbioM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDEyOSBTYWx0ZWRfX/gMIIo8Q6M+q 6rr+ZSdHDI1Y1gLsP9dkag65JNORr37AqyOOxHsXiWeTyf4Qu2yf6wYDuxI5S32iecp/SEyMob2 bpf0rNKiTyZAAIpgfj694QG75ZlOGZbIxPZyDSKIhf+gOhAeiF0D+X55aU4NNH48YtbgViu5b69 sUSI0cmOhEmdQigxYMDeh4YYWh5VJGVeiyaVdTLaf2v02OGgmH182d2JMq9AGqdBgPDckR8eQgb AiKxhR5w4EIYxv/QzQpuxM9q596re+10ofB1b9F4V8RvU0ktN30T2kNhdlVPd5gZpJJoAYZ+gGt P8XE0Vu3TqG4s2WU+IwhWaE3P+Hf8Z85M4Q3Ay+ibyL6WKYJC/ZiFHxU68tTWJxTLJQQRYJgCTk /xV8KU+8UMeeYAij0PTgKT5/KvIZdmHyqNEUxV5rEYCTDifC9gaKXylZlrbJe8FoOVf7GUbiO6Z owU08GjZESTmml8jafQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_05,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310129 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260831_075956_203780_8D3DA4FC X-CRM114-Status: GOOD ( 25.25 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Teach iommufd_sw_msi_get_map() to match an ordered physical address list against an existing contiguous IOVA range. Mark the first map with the range size so an identical list can reuse the allocation. Teach iommufd_sw_msi_alloc_map() to reserve identifiers and offsets for the complete list and build its maps on a temporary list. Keep the existing scalar installation behavior and only publish newly allocated maps after installation succeeds. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/driver.c | 161 ++++++++++++++++++------ drivers/iommu/iommufd/iommufd_private.h | 1 + 2 files changed, 123 insertions(+), 39 deletions(-) diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 8bb47a81fed1..6a0527f4b058 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -179,35 +179,91 @@ EXPORT_SYMBOL_NS_GPL(iommufd_viommu_report_event, "IOMMUFD"); #ifdef CONFIG_IRQ_MSI_IOMMU /* - * Get a iommufd_sw_msi_map for the msi physical address requested by the irq + * Get an iommufd_sw_msi_map for the msi physical addresses requested by the irq * layer. The mapping to IOVA is global to the iommufd file descriptor, every * domain that is attached to a device using the same MSI parameters will use - * the same IOVA. + * the same contiguous IOVA range. */ static struct iommufd_sw_msi_map * -iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - const struct iommufd_sw_msi_range *sw_msi_range) +iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, const phys_addr_t *phys_addrs, + unsigned int nr_addrs, const struct iommufd_sw_msi_range *sw_msi_range) { - struct iommufd_sw_msi_map *cur; + struct iommufd_sw_msi_map *cur, *msi_map; + unsigned int nr_found; lockdep_assert_held(&ictx->sw_msi_lock); - list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { - if (cur->sw_msi_start != sw_msi_range->start || - cur->pgoff >= sw_msi_range->length / PAGE_SIZE) + list_for_each_entry(msi_map, &ictx->sw_msi_list, sw_msi_item) { + if (msi_map->sw_msi_start != sw_msi_range->start || + msi_map->msi_addr != phys_addrs[0]) + continue; + if (msi_map->range_size != nr_addrs * PAGE_SIZE) continue; - if (cur->msi_addr == msi_addr) - return cur; + if (msi_map->pgoff > sw_msi_range->length / PAGE_SIZE || + nr_addrs > sw_msi_range->length / PAGE_SIZE - msi_map->pgoff) + continue; + + nr_found = 0; + list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { + unsigned int index; + + if (cur->sw_msi_start != sw_msi_range->start || + cur->pgoff < msi_map->pgoff) + continue; + index = cur->pgoff - msi_map->pgoff; + if (index >= nr_addrs) + continue; + if (cur->msi_addr != phys_addrs[index]) + break; + nr_found++; + } + if (nr_found == nr_addrs) + return msi_map; } return NULL; } +static int iommufd_sw_msi_check_alloc(struct iommufd_ctx *ictx, + const struct iommufd_sw_msi_range *sw_msi_range, + unsigned int first_pgoff, unsigned int nr_addrs, + size_t *range_size) +{ + unsigned long max_iova_pgoff; + unsigned int last_pgoff; + unsigned int last_id; + size_t range_pages; + + if (!nr_addrs) + return -EINVAL; + if (sw_msi_range->start > ULONG_MAX) + return -EOVERFLOW; + + range_pages = sw_msi_range->length / PAGE_SIZE; + max_iova_pgoff = (ULONG_MAX - sw_msi_range->start) / PAGE_SIZE; + + if (check_add_overflow(ictx->sw_msi_id, nr_addrs - 1, &last_id) || + last_id > IOMMUFD_SW_MSI_MAX_ID || + check_add_overflow(first_pgoff, nr_addrs - 1, &last_pgoff) || + last_pgoff > max_iova_pgoff || + check_mul_overflow((size_t)nr_addrs, PAGE_SIZE, range_size)) + return -EOVERFLOW; + + if (last_pgoff >= range_pages) + return -ENOSPC; + + return 0; +} + static struct iommufd_sw_msi_map * -iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - const struct iommufd_sw_msi_range *sw_msi_range) +iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, const phys_addr_t *phys_addrs, + unsigned int nr_addrs, const struct iommufd_sw_msi_range *sw_msi_range, + struct list_head *new_msi_maps) { - struct iommufd_sw_msi_map *cur; - unsigned int max_pgoff = 0; + struct iommufd_sw_msi_map *cur, *first_map = NULL; + unsigned int next_pgoff = 0; + unsigned int i; + size_t size; + int rc; lockdep_assert_held(&ictx->sw_msi_lock); @@ -216,25 +272,38 @@ iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, continue; if (cur->pgoff == UINT_MAX) return ERR_PTR(-EOVERFLOW); - max_pgoff = max(max_pgoff, cur->pgoff + 1); + next_pgoff = max(next_pgoff, cur->pgoff + 1); } - if (ictx->sw_msi_id > IOMMUFD_SW_MSI_MAX_ID || - max_pgoff > (ULONG_MAX - sw_msi_range->start) / PAGE_SIZE) - return ERR_PTR(-EOVERFLOW); - if (max_pgoff >= sw_msi_range->length / PAGE_SIZE) - return ERR_PTR(-ENOSPC); - - cur = kzalloc_obj(*cur); - if (!cur) - return ERR_PTR(-ENOMEM); - - cur->sw_msi_start = sw_msi_range->start; - cur->msi_addr = msi_addr; - cur->pgoff = max_pgoff; - cur->id = ictx->sw_msi_id++; - list_add_tail(&cur->sw_msi_item, &ictx->sw_msi_list); - return cur; + rc = iommufd_sw_msi_check_alloc(ictx, sw_msi_range, next_pgoff, nr_addrs, &size); + if (rc) + return ERR_PTR(rc); + + for (i = 0; i < nr_addrs; i++) { + cur = kzalloc_obj(*cur); + if (!cur) + goto err_free; + + cur->sw_msi_start = sw_msi_range->start; + cur->msi_addr = phys_addrs[i]; + cur->pgoff = next_pgoff + i; + cur->id = ictx->sw_msi_id + i; + if (!i) { + cur->range_size = size; + first_map = cur; + } + list_add_tail(&cur->sw_msi_item, new_msi_maps); + } + + return first_map; + +err_free: + while (!list_empty(new_msi_maps)) { + cur = list_first_entry(new_msi_maps, typeof(*cur), sw_msi_item); + list_del(&cur->sw_msi_item); + kfree(cur); + } + return ERR_PTR(-ENOMEM); } int iommufd_sw_msi_install(struct iommufd_ctx *ictx, @@ -280,7 +349,9 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, struct iommufd_attach_handle *handle; struct iommufd_sw_msi_map *msi_map; struct iommufd_ctx *ictx; + LIST_HEAD(new_msi_maps); unsigned long iova; + phys_addr_t phys_addr; int rc; /* @@ -308,29 +379,41 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, * assume the caller has checked that it is contained with a MMIO region * that is secure to map at PAGE_SIZE. */ - msi_map = iommufd_sw_msi_get_map(handle->idev->ictx, - msi_addr & PAGE_MASK, - &handle->idev->igroup->sw_msi_range); + phys_addr = msi_addr & PAGE_MASK; + msi_map = iommufd_sw_msi_get_map(ictx, &phys_addr, 1, &handle->idev->igroup->sw_msi_range); if (!msi_map) - msi_map = iommufd_sw_msi_alloc_map(handle->idev->ictx, - msi_addr & PAGE_MASK, - &handle->idev->igroup->sw_msi_range); + msi_map = iommufd_sw_msi_alloc_map(ictx, &phys_addr, 1, + &handle->idev->igroup->sw_msi_range, + &new_msi_maps); if (IS_ERR(msi_map)) return PTR_ERR(msi_map); rc = iommufd_sw_msi_maps_ensure(&handle->idev->igroup->required_sw_msi, msi_map->id); if (rc) - return rc; + goto err_free; rc = iommufd_sw_msi_install(ictx, hwpt_paging, msi_map); if (rc) - return rc; + goto err_free; __set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap); + if (!list_empty(&new_msi_maps)) { + list_splice_tail_init(&new_msi_maps, &ictx->sw_msi_list); + ictx->sw_msi_id++; + } + iova = msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; msi_desc_set_iommu_msi_iova(desc, iova, PAGE_SHIFT); return 0; + +err_free: + while (!list_empty(&new_msi_maps)) { + msi_map = list_first_entry(&new_msi_maps, typeof(*msi_map), sw_msi_item); + list_del(&msi_map->sw_msi_item); + kfree(msi_map); + } + return rc; } EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi, "IOMMUFD"); #endif diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 4e2d32809695..797965557281 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -33,6 +33,7 @@ struct iommufd_sw_msi_map { phys_addr_t msi_addr; unsigned int pgoff; unsigned int id; + size_t range_size; /* IOVA range size, or 0 if not the first map */ }; /* Bitmap of struct iommufd_sw_msi_map::id; starts empty, grows on demand. */ -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv