From: Andrew Jones <andrew.jones@oss.qualcomm.com>
To: linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
tglx@kernel.org, kevin.tian@intel.com,
fangyu.yu@linux.alibaba.com
Subject: [PATCH v5 07/17] iommufd: Prepare software MSI installation for address lists
Date: Mon, 31 Aug 2026 16:59:33 +0200 [thread overview]
Message-ID: <20260831145943.313726-8-andrew.jones@oss.qualcomm.com> (raw)
In-Reply-To: <20260831145943.313726-1-andrew.jones@oss.qualcomm.com>
Teach the software MSI path to install every mapping in an address list
before publishing newly allocated maps. Mark the complete list as
required by the group and roll back mappings installed by a failed
operation.
Keep iommufd_sw_msi() as a one-address wrapper so existing callers
retain their current behavior.
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
---
drivers/iommu/iommufd/driver.c | 101 +++++++++++++++++++++++----------
1 file changed, 72 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c
index a43a25078f87..45278c11c688 100644
--- a/drivers/iommu/iommufd/driver.c
+++ b/drivers/iommu/iommufd/driver.c
@@ -340,14 +340,14 @@ static int iommufd_sw_msi_install_one(struct iommufd_ctx *ictx,
return 0;
}
-int iommufd_sw_msi_install(struct iommufd_ctx *ictx,
- struct iommufd_hwpt_paging *hwpt_paging,
- struct iommufd_sw_msi_map *base_map)
+static int __iommufd_sw_msi_install_range(struct iommufd_ctx *ictx,
+ struct iommufd_hwpt_paging *hwpt_paging,
+ struct list_head *msi_maps,
+ const struct iommufd_sw_msi_map *base_map,
+ unsigned int nr_addrs)
{
struct iommufd_sw_msi_map *msi_map;
- struct list_head *msi_maps = &ictx->sw_msi_list;
unsigned long *newly_mapped;
- unsigned int nr_addrs = base_map->range_size ? base_map->range_size / PAGE_SIZE : 1;
unsigned int nr_found = 0;
unsigned int index;
int rc = 0;
@@ -392,16 +392,36 @@ int iommufd_sw_msi_install(struct iommufd_ctx *ictx,
bitmap_free(newly_mapped);
return rc;
}
+
+int iommufd_sw_msi_install(struct iommufd_ctx *ictx,
+ struct iommufd_hwpt_paging *hwpt_paging,
+ struct iommufd_sw_msi_map *base_map)
+{
+ unsigned int nr_addrs = base_map->range_size ? base_map->range_size / PAGE_SIZE : 1;
+
+ return __iommufd_sw_msi_install_range(ictx, hwpt_paging, &ictx->sw_msi_list, base_map,
+ nr_addrs);
+}
EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi_install, "IOMMUFD_INTERNAL");
-/*
- * Called by the irq code if the platform translates the MSI address through the
- * IOMMU. msi_addr is the physical address of the MSI page. iommufd will
- * allocate a fd global iova for the physical page that is the same on all
- * domains and devices.
- */
-int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
- phys_addr_t msi_addr)
+static void iommufd_sw_msi_set_required(struct iommufd_group *igroup,
+ struct list_head *msi_maps,
+ const struct iommufd_sw_msi_map *base_map,
+ unsigned int nr_addrs)
+{
+ struct iommufd_sw_msi_map *msi_map;
+ unsigned int index;
+
+ list_for_each_entry(msi_map, msi_maps, sw_msi_item) {
+ if (!iommufd_sw_msi_range_index(msi_map, base_map, nr_addrs, &index))
+ continue;
+ __set_bit(msi_map->id, igroup->required_sw_msi.bitmap);
+ }
+}
+
+static int iommufd_sw_msi_list(struct iommu_domain *domain, struct msi_desc *desc,
+ const phys_addr_t *phys_addrs, unsigned int nr_addrs,
+ size_t granule)
{
struct device *dev = msi_desc_to_dev(desc);
struct iommufd_hwpt_paging *hwpt_paging;
@@ -410,10 +430,19 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
struct iommufd_sw_msi_map *msi_map;
struct iommufd_ctx *ictx;
LIST_HEAD(new_msi_maps);
+ struct list_head *msi_maps;
unsigned long iova;
- phys_addr_t phys_addr;
+ unsigned int i;
int rc;
+ if (granule != PAGE_SIZE)
+ return -EOPNOTSUPP;
+ if (!nr_addrs || nr_addrs > SIZE_MAX / PAGE_SIZE)
+ return -EINVAL;
+ for (i = 0; i < nr_addrs; i++)
+ if (!IS_ALIGNED(phys_addrs[i], PAGE_SIZE))
+ return -EINVAL;
+
/*
* It is safe to call iommu_attach_handle_get() here because the iommu
* core code invokes this under the group mutex which also prevents any
@@ -434,33 +463,33 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
ictx = handle->idev->ictx;
guard(mutex)(&ictx->sw_msi_lock);
- /*
- * The input msi_addr is the exact byte offset of the MSI doorbell, we
- * assume the caller has checked that it is contained with a MMIO region
- * that is secure to map at PAGE_SIZE.
- */
- phys_addr = msi_addr & PAGE_MASK;
- msi_map = iommufd_sw_msi_get_map(ictx, &phys_addr, 1, &handle->idev->igroup->sw_msi_range);
- if (!msi_map)
- msi_map = iommufd_sw_msi_alloc_map(ictx, &phys_addr, 1,
+ msi_map = iommufd_sw_msi_get_map(ictx, phys_addrs, nr_addrs,
+ &handle->idev->igroup->sw_msi_range);
+ if (msi_map) {
+ msi_maps = &ictx->sw_msi_list;
+ } else {
+ msi_map = iommufd_sw_msi_alloc_map(ictx, phys_addrs, nr_addrs,
&handle->idev->igroup->sw_msi_range,
&new_msi_maps);
- if (IS_ERR(msi_map))
- return PTR_ERR(msi_map);
+ if (IS_ERR(msi_map))
+ return PTR_ERR(msi_map);
+ msi_maps = &new_msi_maps;
+ }
rc = iommufd_sw_msi_maps_ensure(&handle->idev->igroup->required_sw_msi,
- msi_map->id);
+ msi_map->id + nr_addrs - 1);
if (rc)
goto err_free;
- rc = iommufd_sw_msi_install(ictx, hwpt_paging, msi_map);
+ rc = __iommufd_sw_msi_install_range(ictx, hwpt_paging, msi_maps, msi_map, nr_addrs);
if (rc)
goto err_free;
- __set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap);
+
+ iommufd_sw_msi_set_required(handle->idev->igroup, msi_maps, msi_map, nr_addrs);
if (!list_empty(&new_msi_maps)) {
list_splice_tail_init(&new_msi_maps, &ictx->sw_msi_list);
- ictx->sw_msi_id++;
+ ictx->sw_msi_id += nr_addrs;
}
iova = msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE;
@@ -475,6 +504,20 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
}
return rc;
}
+
+/*
+ * Called by the irq code if the platform translates the MSI address through the
+ * IOMMU. msi_addr is the physical address of the MSI page. iommufd will
+ * allocate a fd global iova for the physical page that is the same on all
+ * domains and devices.
+ */
+int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
+ phys_addr_t msi_addr)
+{
+ phys_addr_t phys_addr = msi_addr & PAGE_MASK;
+
+ return iommufd_sw_msi_list(domain, desc, &phys_addr, 1, PAGE_SIZE);
+}
EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi, "IOMMUFD");
#endif
--
2.43.0
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next prev parent reply other threads:[~2026-08-31 15:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 14:59 [PATCH v5 00/17] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO Andrew Jones
2026-08-31 14:59 ` [PATCH v5 01/17] iommu/dma: Prepare MSI physical address lists Andrew Jones
2026-08-31 14:59 ` [PATCH v5 02/17] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
2026-09-01 7:52 ` Nutty.Liu
2026-08-31 14:59 ` [PATCH v5 03/17] iommufd: Split software MSI map lookup and allocation Andrew Jones
2026-08-31 14:59 ` [PATCH v5 04/17] iommufd: Bound software MSI mappings to the reserved range Andrew Jones
2026-08-31 14:59 ` [PATCH v5 05/17] iommufd: Prepare software MSI maps for address lists Andrew Jones
2026-08-31 14:59 ` [PATCH v5 06/17] iommufd: Install software MSI map ranges atomically Andrew Jones
2026-08-31 14:59 ` Andrew Jones [this message]
2026-08-31 14:59 ` [PATCH v5 08/17] iommu/dma: Introduce iommu_dma_prepare_msi_list() Andrew Jones
2026-08-31 14:59 ` [PATCH v5 09/17] iommu/riscv: Report cache coherency capability Andrew Jones
2026-08-31 14:59 ` [PATCH v5 10/17] iommu/riscv: Reserve an MSI IOVA window for iommufd Andrew Jones
2026-08-31 14:59 ` [PATCH v5 11/17] irqchip/riscv-imsic: Add S-mode MSI address list Andrew Jones
2026-09-01 13:38 ` Andrew Jones
2026-08-31 14:59 ` [PATCH v5 12/17] irqchip/riscv-imsic: Support IOMMU MSI address lists Andrew Jones
2026-08-31 14:59 ` [PATCH v5 13/17] iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V Andrew Jones
2026-08-31 14:59 ` [PATCH v5 14/17] vfio: enable IOMMU_TYPE1 for RISC-V Andrew Jones
2026-08-31 14:59 ` [PATCH v5 15/17] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Andrew Jones
2026-08-31 14:59 ` [PATCH v5 16/17] riscv: defconfig: Enable IOMMUFD and VFIO Andrew Jones
2026-08-31 14:59 ` [PATCH v5 17/17] selftests/vfio: Allow building on RISC-V Andrew Jones
2026-09-08 13:08 ` [PATCH v5 00/17] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO fangyu.yu
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