From: Yixun Lan <dlan@kernel.org>
To: Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulfh@kernel.org>
Cc: Long Wan <long.wan@linux.spacemit.com>,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
Yixun Lan <dlan@kernel.org>
Subject: [PATCH 3/7] mmc: sdhci-of-k1: configure PHY mode
Date: Wed, 02 Sep 2026 08:04:24 +0000 [thread overview]
Message-ID: <20260902-07-k3-sdhci-fix-v1-3-b15c5d0f64fd@kernel.org> (raw)
In-Reply-To: <20260902-07-k3-sdhci-fix-v1-0-b15c5d0f64fd@kernel.org>
From: Long Wan <long.wan@linux.spacemit.com>
Apply PHY configuration only for eMMC hosts which enable PHY function mode,
and configure drive strength and bias. While for SD/SDIO hosts mode, bypass
the PHY mode and select TX internal clock instead.
Fixes: f87b273e4b6d ("mmc: sdhci-of-k1: enable essential clock infrastructure for SD operation")
Signed-off-by: Long Wan <long.wan@linux.spacemit.com>
Signed-off-by: Yixun Lan <dlan@kernel.org>
---
drivers/mmc/host/sdhci-of-k1.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-k1.c b/drivers/mmc/host/sdhci-of-k1.c
index afd9536f2368..5dccdd4b217d 100644
--- a/drivers/mmc/host/sdhci-of-k1.c
+++ b/drivers/mmc/host/sdhci-of-k1.c
@@ -169,21 +169,23 @@ static void spacemit_sdhci_reset(struct sdhci_host *host, u8 mask)
if (mask != SDHCI_RESET_ALL)
return;
- spacemit_sdhci_setbits(host, SDHC_PHY_FUNC_EN | SDHC_PHY_PLL_LOCK,
- SPACEMIT_SDHC_PHY_CTRL_REG);
-
- spacemit_sdhci_clrsetbits(host, SDHC_PHY_DRIVE_SEL,
- SDHC_RX_BIAS_CTRL | FIELD_PREP(SDHC_PHY_DRIVE_SEL, 4),
- SPACEMIT_SDHC_PHY_PADCFG_REG);
-
- if (!(host->mmc->caps2 & MMC_CAP2_NO_MMC))
- spacemit_sdhci_setbits(host, SDHC_MMC_CARD_MODE, SPACEMIT_SDHC_MMC_CTRL_REG);
-
- spacemit_sdhci_setbits(host, SDHC_GEN_PAD_CLK_ON, SPACEMIT_SDHC_LEGACY_CTRL_REG);
+ if (host->mmc->caps2 & MMC_CAP2_NO_MMC) {
+ /* SD/SDIO: bypass PHY, use TX internal clock */
+ spacemit_sdhci_setbits(host, SDHC_TX_INT_CLK_SEL, SPACEMIT_SDHC_TX_CFG_REG);
- if (host->mmc->caps2 & MMC_CAP2_NO_MMC)
spacemit_sdhci_setbits(host, SDHC_OVRRD_CLK_OEN | SDHC_FORCE_CLK_ON,
SPACEMIT_SDHC_OP_EXT_REG);
+ } else {
+ /* eMMC: use PHY function mode */
+ spacemit_sdhci_setbits(host, SDHC_PHY_FUNC_EN | SDHC_PHY_PLL_LOCK,
+ SPACEMIT_SDHC_PHY_CTRL_REG);
+
+ spacemit_sdhci_clrsetbits(host, SDHC_PHY_DRIVE_SEL,
+ SDHC_RX_BIAS_CTRL | FIELD_PREP(SDHC_PHY_DRIVE_SEL, 4),
+ SPACEMIT_SDHC_PHY_PADCFG_REG);
+
+ spacemit_sdhci_setbits(host, SDHC_MMC_CARD_MODE, SPACEMIT_SDHC_MMC_CTRL_REG);
+ }
}
static void spacemit_sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned int timing)
--
2.55.0
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next prev parent reply other threads:[~2026-09-02 8:05 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 8:04 [PATCH 0/7] mmc: spacemit: improve clock and tuning logic Yixun Lan
2026-09-02 8:04 ` [PATCH 1/7] mmc: sdhci-of-k1: no pinctrl state switching Yixun Lan
2026-09-02 8:04 ` [PATCH 2/7] mmc: sdhci-of-k1: drop duplicated voltage settings Yixun Lan
2026-09-02 8:04 ` Yixun Lan [this message]
2026-09-02 8:04 ` [PATCH 4/7] mmc: sdhci-of-k1: Improve power control Yixun Lan
2026-09-02 8:04 ` [PATCH 5/7] mmc: sdhci-of-k1: Use finest delay granularity for RX tuning Yixun Lan
2026-09-02 8:04 ` [PATCH 6/7] mmc: sdhci-of-k1: Improve RX tuning window Yixun Lan
2026-09-07 15:53 ` Hung-Chun Tseng
2026-09-02 8:04 ` [PATCH 7/7] mmc: sdhci-of-k1: Implement SD clock gating for voltage switch Yixun Lan
2026-09-09 8:40 ` [PATCH 0/7] mmc: spacemit: improve clock and tuning logic Adrian Hunter
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