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From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>,
	Alexey Charkov <alchark@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Keguang Zhang <keguang.zhang@gmail.com>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	Hal Feng <hal.feng@starfivetech.com>
Subject: Re: [PATCH v5 0/8] Add StarFive JHB100 syscon modules
Date: Tue, 8 Sep 2026 21:06:22 +0100	[thread overview]
Message-ID: <20260908-plaything-clutter-a72865edd110@spud> (raw)
In-Reply-To: <20260828095608.19955-1-changhuang.liang@starfivetech.com>


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On Fri, Aug 28, 2026 at 02:56:00AM -0700, Changhuang Liang wrote:
> StarFive JHB100 has many syscon modules, as listed below:
> - pcieep0_ecsr_syscon	(PCIe endpoint 0 externel syscon)
> - pcieep1_ecsr_syscon
> - host0_syscon		(Host0 syscon)
> - host1_syscon
> - husb0_syscon		(Host USB 0 syscon)
> - husb1_syscon
> - husbd0_syscon		(Host USB device 0 syscon)
> - husbd1_syscon
> - husbcmn_syscon	(Host USB common syscon)
> - gpu0_syscon		(GPU0 syscon)
> - gpu1_syscon
> - b2h_syscon		(BMC to Host syscon)
> - h2b_syscon		(Host to BMC syscon)
> - vout_syscon		(Video output syscon)
> - pcierp_ecsr_syscon	(PCIe root port externel syscon)
> - pcierp_syscon		(PCIe root port syscon)
> - usb_syscon
> - npu_syscon
> - per0_syscon		(Peripheral 0 syscon)
> - per1_syscon
> - per2_syscon
> - per3_syscon
> - sys0_syscon		(System 0 syscon)
> - sys1_syscon
> - sys2_syscon
> - strap_syscon
> - sfc0_filter_syscon	(SFC0 filter syscon)
> - sfc1_filter_syscon
> - sfc2_filter_syscon
> 
> Some syscon modules contain PLL, reset, and socinfo nodes
> 
> This series depends on the series:
> https://lore.kernel.org/all/20260807112923.191627-1-changhuang.liang@starfivetech.com/

I tried to apply the soc patches, but they depend on this so I can't.
Can you get someone from Starfive, ideally one of the listed clock
maintainers, to review that series?

If you look here, about half the patches are missing a review:
https://patchwork.kernel.org/project/lei-conor/list/?series=1142160

If you do that, I'll try to sort out getting a PR sent to the clock
folks for it and figuring out how these bits can go on top.

Thanks,
Conor.

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  parent reply	other threads:[~2026-09-08 20:06 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28  9:56 [PATCH v5 0/8] Add StarFive JHB100 syscon modules Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 1/8] dt-bindings: soc: starfive: " Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 2/8] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 3/8] clk: starfive: Add peripheral-0 " Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 4/8] clk: starfive: Add Peripheral-1 " Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 5/8] reset: starfive: Introduce active_low Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 6/8] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 7/8] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-08-28  9:56 ` [PATCH v5 8/8] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-09-08 20:06 ` Conor Dooley [this message]
2026-09-09  1:06   ` [PATCH v5 0/8] Add StarFive JHB100 syscon modules Changhuang Liang

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