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Mon, 07 Sep 2026 19:03:50 -0700 (PDT) Received: from sw04.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1434c745a09sm893671c88.7.2026.09.07.19.03.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Sep 2026 19:03:49 -0700 (PDT) From: Zong Li To: tomasz.jeznach@linux.dev, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, mark.rutland@arm.com, andrew.jones@oss.qualcomm.com, guoren@kernel.org, david.laight.linux@gmail.com, zhangzhanpeng.jasper@bytedance.com, yang.yicong@picoheart.com, nutty.liu@hotmail.com, iommu@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Zong Li Subject: [PATCH v9 0/2] RISC-V IOMMU HPM support Date: Mon, 7 Sep 2026 19:03:43 -0700 Message-ID: <20260908020347.1836653-1-zong.li@sifive.com> X-Mailer: git-send-email @GIT_VERSION@ MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260907_190352_282398_89F35A77 X-CRM114-Status: GOOD ( 16.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This series implements support for the RISC-V IOMMU hardware performance monitor. The RISC-V IOMMU PMU driver is implemented as an auxiliary device driver created by the parent RISC-V IOMMU driver. Therefore, the child driver can obtain resources and information from the parent device, such as the MMIO base address and IRQ number. Changed in v8: - Rebased onto v7.3-rc2 - Add irq work mechanism for IRQCHIP_MOVE_DEFERRED case - Filter multiple cycle event case Changed in v7: - Rebased onto the v7.3-rc1 - Remove raw spinlock - Check CPU matching at the beginning of irq handler - Add PERF_HES_STOPPED check before overflow handling Changed in v6: - Rebased onto the latest v7.3-rc - Use sysfs_emit instead of cpumap_print_to_pagebuf - Set up on_cpu and irq affinity by cpuhp callbacks - Change type of on_cpu from unsigned int to int - Reject filter operands of cycle event in event_init - Check return value of counter number and masks in probe - Add raw spinlock for race condition (third commit) Changed in v5: - Pick up suggestions from sashiko-bot as follows - Fix event group validation for sw event - Bind IRQ to aux PMU dev instead of parent IOMMU dev - Clear OF bit when event is NULL - Improve hi-lo-hi patten - Add back IRQF_SHARED flag due to mismatch - Manage cpuhp and pmu register by devre Changed in v4: - Rebased onto v7.3-rc - Use is_sampling_event() instead of accessing vairable directly - Rename the matching name from "iommu.pmu" to "riscv-iommu.pmu" - Change the naming of PMU device for avoid ":" in PCIe case - Add suppress_bind_attrs attribute - Remove IRQF_SHARED flag - Set irq affinity to local CPU of IOMMU - Allocate ID by IDA for auxiliary device - Pick up suggestions from sashiko-bot Changed in v3: - Rebased onto v7.2-rc3 - Use hi_lo_writeq/readq to access register - Pick comments from sashiko-bot as follows - Set IRQ CPU affinity - Remove IRQF_ONESHOT flag when request irq - Adjust cycle event check by checking event_id field only - Fix bug for group events verificaiton - Fix KASAN issue about casting 32-bit variable to unsigned long pointer - Clear IPSR pending bit before starting counter - Clear OF bit in event selector register in irq handler - Release irq by devm instead of explicit free_irq Changed in v2: - Rebased onto v7.2-rc1 - Use hi-lo-hi mechanism to read counter. Suggested by Guo Ren and David Laight Changed in v1: - Rebased onto v6.19-rc8 - Pick all suggestions and feedbacks from v1 series - Add cpu hotplug implementation to avoid race enablement - Move PMU-related definition from header to c file - Change PMU driver to auxiliary device driver Changed in RFC: - Rebase onto v6.13-rc7 - Clear interrupt pending before handling interrupt - Fix the counter value issue caused by OF bit in the cycle counter. - Invoke riscv_iommu_hpm_disable() instead of riscv_iommu_pmu_uninit() in riscv_iommu_remove() Zong Li (2): drivers/perf: riscv-iommu: add risc-v iommu pmu driver iommu/riscv: create a auxiliary device for HPM drivers/iommu/riscv/Kconfig | 1 + drivers/iommu/riscv/iommu-bits.h | 61 -- drivers/iommu/riscv/iommu.c | 37 ++ drivers/perf/Kconfig | 12 + drivers/perf/Makefile | 1 + drivers/perf/riscv_iommu_pmu.c | 1020 ++++++++++++++++++++++++++++++ 6 files changed, 1071 insertions(+), 61 deletions(-) create mode 100644 drivers/perf/riscv_iommu_pmu.c -- 2.43.7 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv