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[2a02:8388:e6ca:5780:e161:768d:5c97:84d0]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fc56eff84sm255659435e9.1.2026.09.21.08.09.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 08:09:16 -0700 (PDT) From: Andrei Lalaev Subject: [PATCH 0/2] Do not reserve memory for coprocessor FW Date: Mon, 21 Sep 2026 17:08:58 +0200 Message-Id: <20260921-sophgo-remove-coprocessor-node-v1-0-ace29446b327@gmail.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXNQQ6CMBBG4auQWTsJNEDEqxgX0P5CTew0M0pIC He36vLbvLeTQSOMLtVOijValFTQnCryy5hmcAzF5GrX14Nr2CQvs7DiKSvYS1bxMBPlJAHcovf dME7dOTgqkay4x+03uN7+tvf0gH99q3QcHwa5uTWCAAAA X-Change-ID: 20260921-sophgo-remove-coprocessor-node-4e6c59ab58d2 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yao Zi Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, Andrei Lalaev X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790003355; l=1759; i=andrey.lalaev@gmail.com; s=20260901; h=from:subject:message-id; bh=hf5kjbI81u8GhWKWua09PR9zzZ8Qo0DwQU4NZxqtTl0=; b=GWyRcQp1oB8Sh4EZuyzCScn2OIWBgOKi080vPgH/ZvEmbEh78yfsQHts+sQRZUH9qqncxyCcU SRwo1HzBuu3AZg9vJqEr7ZCrzi3yECFcHcvQk3vfnM+Il1FVWF7qKSA X-Developer-Key: i=andrey.lalaev@gmail.com; a=ed25519; pk=YHk+K3q98GV/1CigmrEAQ+Vc0o+GlFWt3j94jvrEh6o= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260921_160931_023807_E23A82F0 X-CRM114-Status: UNSURE ( 7.70 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Milk-V Duo and Duo-256M reserve a region for coprocessor FW at the end of RAM. It is not correct because: - FSBL can be configured to load FW into a different region - if no firmware is loaded, the reserved memory is wasted As explained in [1, 2], FSBL should reserve the region at runtime. The latest FSBL can boot the system without coprocessor FW: FSBL Jb2829:g6f8962c394dd-dirty:2026-09-20T13:04:17+00:00 st_on_reason=d0000 st_off_reason=0 P2S/0x1000/0xc00fa00. SD/0xaa00/0x1000/0x1000/0.P2E. cv181x DDR init. ddr_param[0]=0x0. pkg_type=5 D1_3_2 DDR3-2G-QFN Data rate=1866. DDR BIST PASS PLLS. PLLE. C2S/0x0/0x0/0x0. No C906L image. MS/0xba00/0x80000000/0x43e00. SD/0xba00/0x43e00/0x43e00/0.ME. L2/0x4f800. SD/0x4f800/0x200/0x200/0.L2/0x33334c42/0xcafe4b49/0x80200000/0x8c200/0x8c200 SD/0x4f800/0x8c200/0x8c200/0.sys_switch_all_to_pll... Loader_2nd loaded. Use internal 32k So it is safe to remove `coprocessor_rtos` nodes. [1]: https://lore.kernel.org/sophgo/6e4b5c98-7d48-4629-a6a0-4d930327f9a0@sifive.com/ [2]: https://lore.kernel.org/sophgo/aqrhRic7Ww6fPhxg@pie/ Signed-off-by: Andrei Lalaev --- Andrei Lalaev (2): riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 ----------- arch/riscv/boot/dts/sophgo/sg2002-milkv-duo256m.dts | 11 ----------- 2 files changed, 22 deletions(-) --- base-commit: 93f51579e7df248780214094418f205253383cc5 change-id: 20260921-sophgo-remove-coprocessor-node-4e6c59ab58d2 Best regards, -- Andrei Lalaev _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv