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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Sep 22, 2026 at 04:35:34PM +0100, Lorenzo Stoakes (ARM) wrote: >Currently riscv gates MMU_GATHER_RCU_TABLE_FREE on CONFIG_SMP and >CONFIG_MMU. > >Commit 69be3fb111e7 ("riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && >MMU") enabled CONFIG_MMU_GATHER_RCU_TABLE_FREE for CONFIG_SMP, CONFIG_MMU >riscv builds. > >This is expressly for the safety of GUP-fast walkers (CONFIG_HAVE_GUP_FAST >is enabled if CONFIG_MMU is enabled). > >Naturally a single core system does not encounter issues with software page >table walkers being correctly synchronised across cores, as there is only a >single core. > >However, CONFIG_PREEMPT_RCU is still available on a riscv UP system, so for >a future RCU-only page table walker, this guarantee is required to prevent >concurrent page table teardown. > >All page table freeing is already done via tlb_remove_ptdesc() so the >conditions of CONFIG_MMU_GATHER_RCU_TABLE_FREE are already met. > >This forms part of an overall effort to switch every architecture to this >mode. > >Acked-by: Kiryl Shutsemau (Meta) >Signed-off-by: Lorenzo Stoakes (ARM) >--- Yeah, for RISC-V, page-table freeing already goes through tlb_remove_ptdesc() :) Tested on QEMU, no issues seen :) Tested-by: Lance Yang _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv