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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-91bce8918bdsm4228956d6.48.2026.10.15.17.00.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Oct 2026 17:00:05 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1xHVMi-00000000H7g-17qS; Thu, 15 Oct 2026 21:00:04 -0300 Date: Thu, 15 Oct 2026 21:00:04 -0300 From: Jason Gunthorpe To: Gong Shuai Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Tomasz Jeznach , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Paolo Bonzini , Sean Christopherson , Kevin Tian , Andrew Jones , Fangyu Yu , Wu Fei , Zhao Qingye , Gong Shuai Subject: Re: [RFC PATCH 0/12] iommu/riscv: Add nested translation (vIOMMU) support Message-ID: <20261016000004.GB14213@ziepe.ca> References: <20261015065232.604503-1-gong.shuai@sanechips.com.cn> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20261015065232.604503-1-gong.shuai@sanechips.com.cn> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261015_170010_435465_B8F91450 X-CRM114-Status: GOOD ( 12.73 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Oct 15, 2026 at 02:52:20PM +0800, Gong Shuai wrote: > Add nested translation support to the RISC-V IOMMU driver, so a KVM guest > with its own vIOMMU can own the first stage of a device context while the > host keeps the second stage, and add the interrupt support. This is an RFC > and comments on the design are welcome. The iommufd parts looked reasonable to me I feel some mild skepticism about all the MSI parts, it would be good to get more of the interrupt stuff actually landed before posting this again. Please try harder on the commit messages, do not use AI to write them like this. They need to explain why this patch exists and what problem it is solving not some inscrutible description of what it contains. You'll need other riscv people to help you with reviewing it. Jason _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv