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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93f1a0d0718sm232558985a.5.2026.10.16.08.00.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2026 08:00:50 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1xHjQP-00000001teG-31SO; Fri, 16 Oct 2026 12:00:49 -0300 Date: Fri, 16 Oct 2026 12:00:49 -0300 From: Jason Gunthorpe To: Gong Shuai Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com, anup@brainfault.org, aou@eecs.berkeley.edu, atish.patra@linux.dev, fangyu.yu@linux.alibaba.com, gsh517025@gmail.com, iommu@lists.linux.dev, joro@8bytes.org, kevin.tian@intel.com, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, pbonzini@redhat.com, pjw@kernel.org, robin.murphy@arm.com, seanjc@google.com, tomasz.jeznach@linux.dev, will@kernel.org, wu.fei9@sanechips.com.cn, zhao.qingye@sanechips.com.cn Subject: Re: [RFC PATCH 02/12] iommufd: Add RISC-V IOMMU hwpt and vIOMMU types Message-ID: <20261016150049.GG14213@ziepe.ca> References: <20261015235400.GZ14213@ziepe.ca> <20261016073020.10119-1-gong.shuai@sanechips.com.cn> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20261016073020.10119-1-gong.shuai@sanechips.com.cn> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261016_080053_351807_D8948618 X-CRM114-Status: GOOD ( 12.38 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Oct 16, 2026 at 03:30:20PM +0800, Gong Shuai wrote: > Hi Jason, > > Thank you for your review. > > > > +/** > > > + * struct iommu_hwpt_riscv - RISC-V IOMMU stage-1 page table data > > > + * (IOMMU_HWPT_DATA_RISCV_S1) > > > + * @tc: Guest device context translation control > > > + * @iosatp: Guest device context stage-1 root page table pointer > > > + */ > > > +struct iommu_hwpt_riscv { > > > + __aligned_u64 tc; > > > + __aligned_u64 iosatp; > > > +}; > > > > Like the others you need a spec reference explaining exactly what > > these fields are. > > I'll add references to the device-context sections of the RISC-V IOMMU > specification ("Leaf DDT entry", "Device-context fields", "Translation > control (tc)", and "First-Stage context (fsc)"), and I'll also include > detailed field information, as ARM does. > > Also, I'll rename the field from iosatp to fsc. It holds iosatp when > PDTV=0 and process-directory-table pointer (pdtp) when PDTV=1, and the > two share the same layout, so the name should cover both interpretations > and the uAPI won't need to change when Process-Directory-Table (PDT) > support is added. You might be better off just to have a data[] array of the device context. I prefer the fields are not parsed out in userspace.. Future specs may add more guest controlled bits and in other places? Jason _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv