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[180.177.138.120]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e97e5d98d9sm23030035ad.2.2026.10.17.11.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Oct 2026 11:01:46 -0700 (PDT) From: Hung-Chun Tseng To: Yixun Lan , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , E Shattow , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/2] riscv: dts: spacemit: mark K1 boot nodes bootph-pre-ram Date: Sun, 18 Oct 2026 02:01:39 +0800 Message-ID: <20261017180141.3477743-1-alan.tseng.cs@gmail.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261017_110148_568301_35D67BD5 X-CRM114-Status: GOOD ( 13.43 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org A bootloader SPL on the SpacemiT K1 runs from SRAM and needs a handful of nodes before DRAM is up: the root clocks and clock controllers, the console UART, the boot media (SD, eMMC, QSPI NOR), the board EEPROM used to identify the board, and the PMIC rails it programs before DRAM training. Today mainline U-Boot carries the bootph-pre-ram tags for these in per-board -u-boot.dtsi files. When I sent a U-Boot patch adding another such file for the Milk-V Jupiter, E Shattow asked for the tags to go upstream first, so every K1 board gets them and the U-Boot overlays can shrink [1]. Earlier there was no working mainline SPL for K1 to justify them; there is now. Patch 1 tags the SoC nodes in k1.dtsi, including i2c8, which every K1 board uses for the PMIC. Patch 2 tags the board-specific EEPROM and its bus, the PMIC rails and the SPI NOR on the boards that have them. The set of nodes matches what the mainline U-Boot SPL tags for the BPI-F3 and MusePi Pro. Pin control and regulator supplies are left untagged: the K1 SPL does not enable SPL_PINCTRL, and neither the P1 PMIC driver nor the SPI NOR and EEPROM drivers look up supplies there. Testing: all K1 DTBs build, and dtbs_check is clean for them with and without this series. I have not run an SPL built from these trees on hardware. On a Milk-V Jupiter running Linux I checked that the EEPROM, PMIC and SPI NOR answer at the addresses described. Changes in v2: - Tag i2c8 in k1.dtsi instead of in every board file (Yixun) - Rebase onto the spacemit dt-for-next branch, where buck1 now carries the buck1_0v9 label on musepi-pro and the OrangePi boards - Link to v1: https://lore.kernel.org/all/20261012235624.77993-1-alan.tseng.cs@gmail.com/ [1] https://lore.kernel.org/u-boot/5d323a11-da4e-4071-bdeb-ab5c03e8f85e@freeshell.de/ Hung-Chun Tseng (2): riscv: dts: spacemit: k1: mark boot-critical SoC nodes bootph-pre-ram riscv: dts: spacemit: mark K1 board boot devices bootph-pre-ram arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi | 6 ++++++ arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++ arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts | 7 +++++++ arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts | 7 +++++++ arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts | 4 ++++ arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 5 +++++ arch/riscv/boot/dts/spacemit/k1.dtsi | 13 +++++++++++++ 7 files changed, 48 insertions(+) base-commit: d05c6236496071916e19012cda7149465f15e66e -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv