From: kernel test robot <lkp@intel.com>
To: Andy Chiu <tchiu@tenstorrent.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Oleg Nesterov <oleg@redhat.com>,
linux-riscv@lists.infradead.org
Cc: oe-kbuild-all@lists.linux.dev, andybnac@gmail.com,
daichengrong <daichengrong@iscas.ac.cn>,
gdb@sourceware.org, Andy Chiu <tchiu@tenstorrent.com>,
dfustini@oss.tenstorrent.com, greentime.hu@sifive.com,
Yong-Xuan Wang <yongxuan.wang@sifive.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Anup Patel <anup@brainfault.org>,
Guobin Zhang <guobin.zhang@intel.com>,
Troy Mitchell <troy.mitchell@linux.dev>,
Deepak Gupta <debug@rivosinc.com>,
Sergey Matyukevich <geomatsi@gmail.com>
Subject: Re: [PATCH v7 3/6] riscv: clarify vector state semantics on syscall and context switch
Date: Thu, 12 Nov 2026 20:12:29 +0800 [thread overview]
Message-ID: <202611122049.91BrkXTs-lkp@intel.com> (raw)
In-Reply-To: <20261111184359.1239821-4-tchiu@tenstorrent.com>
Hi Andy,
kernel test robot noticed the following build errors:
[auto build test ERROR on d1a8d411533d6be16ac79796c02a9bfc7d7958f1]
url: https://github.com/intel-lab-lkp/linux/commits/Andy-Chiu/riscv-vector-refactor-vector-context-operations/20261111-124323
base: d1a8d411533d6be16ac79796c02a9bfc7d7958f1
patch link: https://lore.kernel.org/r/20261111184359.1239821-4-tchiu%40tenstorrent.com
patch subject: [PATCH v7 3/6] riscv: clarify vector state semantics on syscall and context switch
config: riscv-allnoconfig (https://download.01.org/0day-ci/archive/20261112/202611122049.91BrkXTs-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 16.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261112/202611122049.91BrkXTs-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202611122049.91BrkXTs-lkp@intel.com/
All errors (new ones prefixed by >>):
arch/riscv/kernel/signal.c: In function '__restore_v_state':
>> arch/riscv/kernel/signal.c:130:9: error: implicit declaration of function '__riscv_v_vstate_clean'; did you mean 'riscv_v_vstate_query'? [-Wimplicit-function-declaration]
130 | __riscv_v_vstate_clean(regs);
| ^~~~~~~~~~~~~~~~~~~~~~
| riscv_v_vstate_query
vim +130 arch/riscv/kernel/signal.c
107
108 /*
109 * Restore Vector extension context from the user's signal frame. This function
110 * assumes a valid extension header. So magic and size checking must be done by
111 * the caller.
112 */
113 static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec)
114 {
115 long err;
116 struct __sc_riscv_v_state __user *state = sc_vec;
117 void __user *datap;
118
119 /*
120 * Mark the vstate as clean prior performing the actual copy,
121 * to avoid getting the vstate incorrectly clobbered by the
122 * discarded vector state.
123 *
124 * This also allows user to modify vregs through the signal
125 * interface at a syscall stop. e.g. to support user space
126 * context switching.
127 */
128 preempt_disable();
129 riscv_v_vstate_set_restore(current, regs);
> 130 __riscv_v_vstate_clean(regs);
131 preempt_enable();
132
133 /* Copy everything of __sc_riscv_v_state except datap. */
134 err = __copy_from_user(¤t->thread.vstate, &state->v_state,
135 offsetof(struct __riscv_v_ext_state, datap));
136 if (unlikely(err))
137 return err;
138
139 /* Copy the pointer datap itself. */
140 err = __get_user(datap, &state->v_state.datap);
141 if (unlikely(err))
142 return err;
143 /*
144 * Copy the whole vector content from user space datap. Use
145 * copy_from_user to prevent information leak.
146 */
147 return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize);
148 }
149
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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next prev parent reply other threads:[~2026-11-12 12:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 18:43 [PATCH v7 0/6] riscv: optimize mode switch latency for Vector Andy Chiu
2026-11-11 18:43 ` [PATCH v7 1/6] riscv: vector: refactor vector context operations Andy Chiu
2026-11-13 18:15 ` kernel test robot
2026-11-11 18:43 ` [PATCH v7 2/6] riscv: introduce riscv_v_ucontext_save() for signal and ptrace Andy Chiu
2026-11-11 18:43 ` [PATCH v7 3/6] riscv: clarify vector state semantics on syscall and context switch Andy Chiu
2026-11-12 12:12 ` kernel test robot [this message]
2026-11-11 18:43 ` [PATCH v7 4/6] selftests: riscv: Extend vector tests for sigreturn and ptrace Andy Chiu
2026-11-11 18:43 ` [PATCH v7 5/6] riscv: vector: optimize vstate operations Andy Chiu
2026-11-11 23:00 ` Conor Dooley
2026-11-11 18:43 ` [PATCH v7 6/6] riscv: KVM: do not save host vector context for vcpu Andy Chiu
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