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bh=IAXDzBRARqGuWFKHNo+aw3J6+tC4cDZIOgfc+O9TnKM=; b=KXf8KnsELmuZ68+O4xGbHDKP39F/ob3GelkkJxFi755vN7e9wqF+ePCZhqxdPO6sBszYU9 hT+52st9P5rDrHcPtgu3+ehl9/g5cVvarto9lr4UZCE0O0wM6sQaXgUJBO+pU9WCgoxHVU UEUE/6OfNKltvSic9RP5pxmurnoDBog= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-182-DA7Ib6_UPm-Qx5l3Quy1qw-1; Sun, 31 Oct 2021 18:48:35 -0400 X-MC-Unique: DA7Ib6_UPm-Qx5l3Quy1qw-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 95B171006AA2; Sun, 31 Oct 2021 22:48:31 +0000 (UTC) Received: from starship (unknown [10.40.194.243]) by smtp.corp.redhat.com (Postfix) with ESMTP id 03B4019C79; Sun, 31 Oct 2021 22:48:18 +0000 (UTC) Message-ID: <20a17d75855dfb9bd496466fcd9f14baab0b2bda.camel@redhat.com> Subject: Re: [PATCH v2 26/43] KVM: VMX: Read Posted Interrupt "control" exactly once per loop iteration From: Maxim Levitsky To: Sean Christopherson Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Date: Mon, 01 Nov 2021 00:48:17 +0200 In-Reply-To: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-27-seanjc@google.com> User-Agent: Evolution 3.36.5 (3.36.5-2.fc32) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211031_154841_672879_DEA9D131 X-CRM114-Status: GOOD ( 35.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, 2021-10-28 at 15:55 +0000, Sean Christopherson wrote: > On Thu, Oct 28, 2021, Maxim Levitsky wrote: > > On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > > > Use READ_ONCE() when loading the posted interrupt descriptor control > > > field to ensure "old" and "new" have the same base value. If the > > > compiler emits separate loads, and loads into "new" before "old", KVM > > > could theoretically drop the ON bit if it were set between the loads. > > > > > > Fixes: 28b835d60fcc ("KVM: Update Posted-Interrupts Descriptor when vCPU is preempted") > > > Signed-off-by: Sean Christopherson > > > --- > > > arch/x86/kvm/vmx/posted_intr.c | 6 +++--- > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > > > index 414ea6972b5c..fea343dcc011 100644 > > > --- a/arch/x86/kvm/vmx/posted_intr.c > > > +++ b/arch/x86/kvm/vmx/posted_intr.c > > > @@ -53,7 +53,7 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu) > > > > > > /* The full case. */ > > > do { > > > - old.control = new.control = pi_desc->control; > > > + old.control = new.control = READ_ONCE(pi_desc->control); > > > > > > dest = cpu_physical_id(cpu); > > > > > > @@ -104,7 +104,7 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > > > "Wakeup handler not enabled while the vCPU was blocking"); > > > > > > do { > > > - old.control = new.control = pi_desc->control; > > > + old.control = new.control = READ_ONCE(pi_desc->control); > > > > > > dest = cpu_physical_id(vcpu->cpu); > > > > > > @@ -160,7 +160,7 @@ int pi_pre_block(struct kvm_vcpu *vcpu) > > > "Posted Interrupt Suppress Notification set before blocking"); > > > > > > do { > > > - old.control = new.control = pi_desc->control; > > > + old.control = new.control = READ_ONCE(pi_desc->control); > > > > > > /* set 'NV' to 'wakeup vector' */ > > > new.nv = POSTED_INTR_WAKEUP_VECTOR; > > > > I wish there was a way to mark fields in a struct, as requiring 'READ_ONCE' on them > > so that compiler would complain if this isn't done, or automatically use 'READ_ONCE' > > logic. > > Hmm, I think you could make an argument that ON and thus the whole "control" > word should be volatile. AFAICT, tagging just "on" as volatile actually works. > There's even in a clause in Documentation/process/volatile-considered-harmful.rst > that calls this out as a (potentially) legitimate use case. > > - Pointers to data structures in coherent memory which might be modified > by I/O devices can, sometimes, legitimately be volatile. > > That said, I think I actually prefer forcing the use of READ_ONCE. The descriptor > requires more protections than what volatile provides, namely that all writes need > to be atomic. So given that volatile alone isn't sufficient, I'd prefer to have > the code itself be more self-documenting. I took a look at how READ_ONCE/WRITE_ONCE is implemented and indeed they use volatile (the comment above __READ_ONCE is worth gold...), so there is a bit of contradiction: volatile-considered-harmful.rst states not to mark struct members volatile since you usually need more that than (very true often) and yet, I also heard that READ_ONCE/WRITE_ONCE is very encouraged to be used to fields that are used in lockless algorithms, even when not strictly needed, so why not to just mark the field and then use it normally? I guess that explicit READ_ONCE/WRITE_ONCE is much more readable/visible that a volatile in some header file. Anyway this isn't something I am going to argue about or push to be changed, just something I thought about. Best regards, Maxim Levitsky > > E.g. this compiles and does mess up the expected size. > > diff --git a/arch/x86/kvm/vmx/posted_intr.h b/arch/x86/kvm/vmx/posted_intr.h > index 7f7b2326caf5..149df3b18789 100644 > --- a/arch/x86/kvm/vmx/posted_intr.h > +++ b/arch/x86/kvm/vmx/posted_intr.h > @@ -11,9 +11,9 @@ struct pi_desc { > union { > struct { > /* bit 256 - Outstanding Notification */ > - u16 on : 1, > + volatile u16 on : 1; > /* bit 257 - Suppress Notification */ > - sn : 1, > + u16 sn : 1, > /* bit 271:258 - Reserved */ > rsvd_1 : 14; > /* bit 279:272 - Notification Vector */ > @@ -23,7 +23,7 @@ struct pi_desc { > /* bit 319:288 - Notification Destination */ > u32 ndst; > }; > - u64 control; > + volatile u64 control; > }; > u32 rsvd[6]; > } __aligned(64); > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv