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Tue, 26 Mar 2024 15:12:25 -0700 (PDT) Received: from [192.168.0.13] ([172.92.174.232]) by smtp.gmail.com with ESMTPSA id r10-20020a62e40a000000b006e6529c7d75sm6516071pfh.3.2024.03.26.15.12.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Mar 2024 15:12:25 -0700 (PDT) Subject: Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board To: Conor Dooley , Bo Gan Cc: kernel@esmil.dk, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Shengyu Qu , Conor Dooley , stable@vger.kernel.org References: <20240326-create-motivate-2792be1692c5@spud> <20240326-ladylike-retold-9034734c2445@spud> From: Bo Gan Message-ID: <222340e5-b5d7-9abc-57df-ad1478090177@gmail.com> Date: Tue, 26 Mar 2024 15:12:13 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20240326-ladylike-retold-9034734c2445@spud> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240326_151228_213311_7C275CEB X-CRM114-Status: GOOD ( 15.57 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 3/26/24 3:10 PM, Conor Dooley wrote: > On Tue, Mar 26, 2024 at 03:06:33PM -0700, Bo Gan wrote: >> On 3/26/24 1:37 PM, Conor Dooley wrote: >>> From: Conor Dooley >>> >>> On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote: >>>> Interrupt line number of the AXP15060 PMIC is not a necessary part of >>>> its device tree. And this would cause kernel to try to enable interrupt >>>> line 0, which is not expected. So delete this part from device tree. >>>> >>>> >>> >>> Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote >>> the commit message to add some more information as promised. >>> >>> [1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board >>> https://git.kernel.org/conor/c/0b163f43920d >>> >>> Thanks, >>> Conor. >>> >> Hi Conor, >> >> Thank you very much for taking care of this. Actually the PLIC may silently >> ignore the enablement of interrupt 0, so the upstream openSBI won't notice >> anything. My modified version, however, will deliberately trigger a fault >> for all writes to the reserved fields of PLIC, thus catching this issue. >> >> Hope it can clarify things a bit more. > > https://git.kernel.org/conor/c/0f74c64f0a9f > > Better? > Great! Thanks again. Bo _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv