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[82.149.1.233]) by smtp.gmail.com with ESMTPSA id e3-20020a170906504300b00930c6c01c9esm14694983ejk.143.2023.03.27.13.46.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 13:46:42 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Samuel Holland , Andre Przywara Subject: Re: [PATCH v2 0/4] ARM: dts: sunxi: Add MangoPi MQ-R board support Date: Mon, 27 Mar 2023 22:46:40 +0200 Message-ID: <2673156.mvXUDI8C0e@jernej-laptop> In-Reply-To: <20230320005249.13403-1-andre.przywara@arm.com> References: <20230320005249.13403-1-andre.przywara@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230327_134645_674126_2F5AD734 X-CRM114-Status: GOOD ( 21.81 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Albert Ou , =?ISO-8859-1?Q?Andr=E1s_Szemz=F6?= , Belisko Marek , Fabien Poussin , linux-kernel@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Paul Walmsley , linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Dne ponedeljek, 20. marec 2023 ob 01:52:45 CEST je Andre Przywara napisal(a): > Hi, > > this is v2, mostly acknowledging the fact that there is an Allwinner D1s > version of the board as well, thus splitting the board .dts into a > shared .dtsi and a stub .dts for the ARM version. I don't have the RISC-V > version, so cannot provide (nor test) this .dts file, but creation should > be easy, being based on the shared board .dtsi file. > Since the D1/D1s .dts files are now merged, this patch set should compile > cleanly now. > > ====================================== > > The MangoPi MQ-R-T113 is a small SBC with the Allwinner T113-s3 SoC. > That is a very close relative to the Allwinner D1/D1s SoCs, but with > Arm Cortex-A7 cores, and 128 MB of SIP co-packaged DDR3 DRAM. > > This series introduces the missing T113-s .dtsi, which builds on top of > the D1/D1s .dtsi, but adds the ARM specific peripherals, like the CPU > cores, the arch timer, the GIC and the PMU. > This requires to add a symlink to the RISC-V DT directory in patch 1/4, > to be able to easily reference the base .dtsi from other architecture > directories. > Since there are versions of the MQ-R boards with the Allwinner D1s, > there is shared .dtsi describing the board peripherals, plus a small > stub .dts to tie together all bits for the actual board. > > Cheers, > Andre > > Changelog v1 ... v2: > - rebase on top of v6.3-rc3 (including now merged D1/D1s .dtsi files) > - refine board naming, stating both RISC-V and ARM versions > - move board .dts into a shared .dtsi (to cover RISC-V version) > - fix 5V regulator node name > > Andre Przywara (4): > dts: add riscv include prefix link > ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi > dt-bindings: arm: sunxi: document MangoPi MQ-R board names > ARM: dts: sunxi: add MangoPi MQ-R-T113 board > > .../devicetree/bindings/arm/sunxi.yaml | 5 + > .../devicetree/bindings/riscv/sunxi.yaml | 5 + > arch/arm/boot/dts/Makefile | 1 + > .../dts/sun8i-t113s-mangopi-mq-r-t113.dts | 35 +++++ > arch/arm/boot/dts/sun8i-t113s.dtsi | 59 ++++++++ > .../boot/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi | 126 ++++++++++++++++++ > scripts/dtc/include-prefixes/riscv | 1 + > 7 files changed, 232 insertions(+) > create mode 100644 arch/arm/boot/dts/sun8i-t113s-mangopi-mq-r-t113.dts > create mode 100644 arch/arm/boot/dts/sun8i-t113s.dtsi > create mode 100644 arch/arm/boot/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi > create mode 120000 scripts/dtc/include-prefixes/riscv Merged, thanks! Best regards, Jernej _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv