[PATCH v1 1/2] LRW UART: dt-bindings: Add binding for LRW UART

LiuQingtao
2026-02-13T09:34:15Z

From: Wenhong Liu <liu.wenhong35@zte.com.cn>

Add documentation for LRW UART devicetree bindings.

Signed-off-by: Wenhong Liu <liu.wenhong35@zte.com.cn>
Signed-off-by: Qingtao Liu <liu.qingtao2@zte.com.cn>
---
.../bindings/serial/lrw,lrw-uart.yaml | 49 +++++++++++++++++++
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
MAINTAINERS | 7 +++
3 files changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml

diff --git a/Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml b/Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml
new file mode 100644
index 000000000000..a2d41c278c4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/lrw-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LRW serial UART
+
+maintainers:
+ - Wenhong Liu <liu.wenhong35@zte.com.cn>
+ - Qingtao Liu <liu.qingtao2@zte.com.cn>
+
+description: |
+ Should be something similar to "lrw,<chip>-uart"
+ for the UART as integrated on a particular chip, It supports
+ multiple CPU architectures, currently including e.g. RISC-V and ARM.
+
+properties:
+ compatible:
+ const: lrw,lrw-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - current-speed
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ uart0: serial@e0001800 {
+ compatible = "lrw,lrw-uart";
+ interrupt-parent = <&aplic0>;
+ interrupts = <0x12 0x4>;
+ reg = <0xe0001800 0x100>;
+ clocks = <&bar_clk>;
+ current-speed = <115200>;
+ };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index ee7fd3cfe203..ec9bf262f466 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -961,6 +961,8 @@ patternProperties:
description: Loongson Technology Corporation Limited
"^loongmasses,.*":
description: Nanjing Loongmasses Ltd.
+ "^lrw,.*":
+ description: LRW Corp.
"^lsi,.*":
description: LSI Corp. (LSI Logic)
"^luckfox,.*":
diff --git a/MAINTAINERS b/MAINTAINERS
index 26898ca27409..ad6acbe24544 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15035,6 +15035,13 @@ L: linux-edac@vger.kernel.org
S: Maintained
F: drivers/edac/loongson_edac.c

+LRW SERIAL DRIVER
+M: Wenhong Liu <liu.wenhong35@zte.com.cn>
+R: Qingtao Liu <liu.qingtao2@zte.com.cn>
+L: linux-serial@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@broadcom.com>
M: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
--
2.27.0