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Mon, 13 Nov 2023 05:49:28 -0800 (PST) Received: from [172.25.81.170] ([12.186.190.2]) by smtp.gmail.com with ESMTPSA id z8-20020a0cfec8000000b00677a12f11bcsm2052439qvs.24.2023.11.13.05.49.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 13 Nov 2023 05:49:27 -0800 (PST) Message-ID: <40f003c9-a94b-4ded-b35b-be4985aba3a2@sifive.com> Date: Mon, 13 Nov 2023 08:49:27 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b Content-Language: en-US To: Conor Dooley , Jisheng Zhang Cc: Tony Lindgren , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Chao Wei , Chen Wang References: <20231113005702.2467-1-jszhang@kernel.org> <20231113005702.2467-2-jszhang@kernel.org> <58a99001-8260-4970-9fc7-25fe81e557a5@sifive.com> <20231113-mama-underarm-a8bbf0c2a1f1@squawk> From: Samuel Holland In-Reply-To: <20231113-mama-underarm-a8bbf0c2a1f1@squawk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231113_054930_388305_1DD76688 X-CRM114-Status: GOOD ( 21.39 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Conor, On 2023-11-13 7:29 AM, Conor Dooley wrote: > On Mon, Nov 13, 2023 at 09:03:11PM +0800, Jisheng Zhang wrote: >> On Sun, Nov 12, 2023 at 08:51:20PM -0500, Samuel Holland wrote: >>> On 2023-11-12 6:57 PM, Jisheng Zhang wrote: >>>> Add the reset device tree node to cv1800b SoC reusing the >>> ^^^^^ >>> I assume you mean pinctrl here? >> >> oops copy and paste the commit msg ;) thanks >>> >>>> pinctrl-single driver. >>>> >>>> Signed-off-by: Jisheng Zhang >>>> --- >>>> arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ >>>> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ >>>> 2 files changed, 29 insertions(+) >>>> create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h >>>> >>>> diff --git a/arch/riscv/boot/dts/sophgo/cv-pinctrl.h b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h >>>> new file mode 100644 >>>> index 000000000000..ed78b6fb3142 >>>> --- /dev/null >>>> +++ b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h >>> >>> A couple of questions: Should this go in include/dt-bindings? And is it worth >> >> When I cooked this series two weeks ago, I did put it in dt-binding, but >> then I found commit fe49f2d776f799 ("arm64: dts: ti: Use local header for >> pinctrl register values"), "These definitions were previously put in the >> bindings header to avoid code duplication and to provide some context >> meaning (name), but they do not fit the purpose of bindings." which is >> suggested and acked by Krzysztof, so I just want to follow the style >> here. >> >> >>> including macros for the actual function mappings, like in the vendor source[1]? >> >> Do you want something as the following? >> >> #define UART0_TX 0 >> #define CAM_MCLK1 1 >> ... >> >> #define REG_UART0_TX 0x24 >> ... >> >> pinctrl-single,pins = ; >> >> Other pinctl-single users just uses the register value directly, I have >> no preference. But I'd like to get suggestions from DT and pinctl-single >> maintainers. Hi Rob, Krzysztof, Conor, Tony, what's your opinion? > > Basically, if the definitions map directly to registers and are just > used to make writing your devicetree easier then they do not belong > in a binding. This differs from clock or reset indices, where we > essentially make up a set of indices that may or may not correlate to > offsets in the hardware as using the register values without any sort of > abstraction is not defining an ABI. Right. I should have remembered this policy :) Regards, Samuel _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv