Re: [PATCH v5 00/10] PolarFire SoC dt for 5.19

Conor.Dooley
2022-05-23T12:23:44Z

On 09/05/2022 15:26, Conor Dooley wrote:
> Hey all,
> Got a few PolarFire SoC device tree related changes here for 5.19.

Hey Palmer,
I know you're busy etc but I had been hoping you'd take this for
5.19. I know it's late, so nw if it's too late.
Thanks,
Conor.

>
> Firstly, patches 1 & 2 of this series supersede [0] & are unchanged
> compared to that submission, figured it would just be easier to keep
> all the changes in one series.
>
> As discussed on irc, patch 3 removes the duplicated "microchip" from
> the device tree files so that they follow a soc-board.dts & a
> soc{,-fabric}.dtsi format.
>
> Patch 5 makes the fabric dtsi board specific by renaming the file to
> mpfs-icicle-kit-fabric.dtsi & including it in the dts rather than
> mpfs.dtsi. Additionally this will allow other boards to define their
> own reference fabric design. A revision specific compatible, added in
> patch 4, is added to the dt also.
>
> The remainder of the series adds a bare minimum devicetree for the
> Sundance Polarberry.
>
> Thanks,
> Conor.
>
> Changes since v4:
> - Whitespace and status ordering changes in the polarberry dt pointed
> out by Heiko
> - A new patch for same whitspace and status order changes, but applied
> to the icicle dt
> - A reordering of the icicle dt alphabetically to match the formatting
> of the polarberry dt
>
> Changes since v3:
> - remove an extra line of wshitespace added to dt-binding
> - remove unneeded "okay" status & sort status to node end
> - sort polarberry dts entries in ~alphabetical order
> - add a comment explaining why the second mac (mac0) is disabled on
> polarberry
>
> Changes since v2:
> - make ,icicle-reference compatible with ,mpfs & put it inside the enum
>
> Changes since v1:
> - fixed whitespace problems in the polarberry dts
> - disabled mac0 for the polarberry as its port is on the optional
> carrier board
>
> Conor Dooley (10):
> riscv: dts: microchip: remove icicle memory clocks
> riscv: dts: microchip: move sysctrlr out of soc bus
> riscv: dts: microchip: remove soc vendor from filenames
> dt-bindings: riscv: microchip: document icicle reference design
> riscv: dts: microchip: make the fabric dtsi board specific
> dt-bindings: vendor-prefixes: add Sundance DSP
> dt-bindings: riscv: microchip: add polarberry compatible string
> riscv: dts: microchip: add the sundance polarberry
> riscv: microchip: icicle: readability fixes
> riscv: dts: icicle: sort nodes alphabetically
>
> .../devicetree/bindings/riscv/microchip.yaml | 2 +
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> arch/riscv/boot/dts/microchip/Makefile | 3 +-
> ...abric.dtsi => mpfs-icicle-kit-fabric.dtsi} | 2 +
> ...pfs-icicle-kit.dts => mpfs-icicle-kit.dts} | 105 +++++++++---------
> .../dts/microchip/mpfs-polarberry-fabric.dtsi | 16 +++
> .../boot/dts/microchip/mpfs-polarberry.dts | 99 +++++++++++++++++
> .../{microchip-mpfs.dtsi => mpfs.dtsi} | 11 +-
> 8 files changed, 181 insertions(+), 59 deletions(-)
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs-fabric.dtsi => mpfs-icicle-kit-fabric.dtsi} (91%)
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs-icicle-kit.dts => mpfs-icicle-kit.dts} (95%)
> create mode 100644 arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi
> create mode 100644 arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs.dtsi => mpfs.dtsi} (98%)
>