From: Stephen Boyd <sboyd@kernel.org>
To: Sia Jee Heng <jeeheng.sia@starfivetech.com>,
aou@eecs.berkeley.edu, conor@kernel.org,
emil.renner.berthing@canonical.com, hal.feng@starfivetech.com,
kernel@esmil.dk, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, p.zabel@pengutronix.de,
palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
xingyu.wu@starfivetech.com
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
jeeheng.sia@starfivetech.com, leyfoon.tan@starfivetech.com
Subject: Re: [RFC v3 08/16] clk: starfive: Add JH8100 North-West clock generator driver
Date: Thu, 11 Apr 2024 00:49:25 -0700 [thread overview]
Message-ID: <44131080f148a472ed5dee901a66ffa7.sboyd@kernel.org> (raw)
In-Reply-To: <20240110133128.286657-9-jeeheng.sia@starfivetech.com>
Quoting Sia Jee Heng (2024-01-10 05:31:20)
> diff --git a/drivers/clk/starfive/clk-starfive-jh8100-nw.c b/drivers/clk/starfive/clk-starfive-jh8100-nw.c
> new file mode 100644
> index 000000000000..018f5af6c777
> --- /dev/null
> +++ b/drivers/clk/starfive/clk-starfive-jh8100-nw.c
> @@ -0,0 +1,237 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * StarFive JH8100 North-West Clock Driver
> + *
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
[...]
> +
> +static int jh8100_nwcrg_probe(struct platform_device *pdev)
> +{
> + struct starfive_clk_priv *priv;
> + unsigned int idx;
> + int ret;
> +
> + priv = devm_kzalloc(&pdev->dev,
> + struct_size(priv, reg, JH8100_NWCLK_NUM_CLKS),
> + GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + spin_lock_init(&priv->rmw_lock);
> + priv->dev = &pdev->dev;
> + priv->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(priv->base))
> + return PTR_ERR(priv->base);
> +
> + for (idx = 0; idx < JH8100_NWCLK_NUM_CLKS; idx++) {
> + u32 max = jh8100_nwcrg_clk_data[idx].max;
> + struct clk_parent_data parents[4] = {};
> + struct clk_init_data init = {
> + .name = jh8100_nwcrg_clk_data[idx].name,
> + .ops = starfive_clk_ops(max),
> + .parent_data = parents,
> + .num_parents =
> + ((max & STARFIVE_CLK_MUX_MASK) >> STARFIVE_CLK_MUX_SHIFT) + 1,
> + .flags = jh8100_nwcrg_clk_data[idx].flags,
> + };
> + struct starfive_clk *clk = &priv->reg[idx];
> + unsigned int i;
> +
> + for (i = 0; i < init.num_parents; i++) {
> + unsigned int pidx = jh8100_nwcrg_clk_data[idx].parents[i];
> +
> + if (pidx < JH8100_NWCLK_NUM_CLKS)
> + parents[i].hw = &priv->reg[pidx].hw;
> + else if (pidx == JH8100_NWCLK_OSC)
> + parents[i].fw_name = "osc";
Please generate this one time with structures and use an index instead
of string names. This is faster in multiple ways, and the parent data is
copied anyway.
> + else if (pidx == JH8100_NWCLK_APB_BUS)
> + parents[i].fw_name = "apb_bus";
> + else if (pidx == JH8100_NWCLK_APB_BUS_PER4)
> + parents[i].fw_name = "apb_bus_per4";
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-04-11 7:49 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-10 13:31 [RFC v3 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 01/16] reset: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2024-03-22 9:19 ` Hal Feng
2024-01-10 13:31 ` [RFC v3 02/16] reset: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2024-03-22 9:33 ` Hal Feng
2024-01-10 13:31 ` [RFC v3 03/16] clk: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2024-03-22 9:34 ` Hal Feng
2024-01-10 13:31 ` [RFC v3 04/16] clk: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2024-03-22 9:36 ` Hal Feng
2024-01-10 13:31 ` [RFC v3 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 06/16] clk: starfive: Add JH8100 System clock generator driver Sia Jee Heng
2024-04-11 7:45 ` Stephen Boyd
2024-01-10 13:31 ` [RFC v3 07/16] dt-bindings: clock: Add StarFive JH8100 North-West clock and reset generator Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 08/16] clk: starfive: Add JH8100 North-West clock generator driver Sia Jee Heng
2024-04-11 7:49 ` Stephen Boyd [this message]
2024-01-10 13:31 ` [RFC v3 09/16] dt-bindings: clock: Add StarFive JH8100 North-East clock and reset generator Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 10/16] clk: starfive: Add JH8100 North-East clock generator driver Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 11/16] dt-bindings: clock: Add StarFive JH8100 South-West clock and reset generator Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 12/16] clk: starfive: Add JH8100 South-West clock generator driver Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 13/16] dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset generator Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 14/16] clk: starfive: Add JH8100 Always-On clock generator driver Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 15/16] reset: starfive: Add StarFive JH8100 reset driver Sia Jee Heng
2024-01-10 13:31 ` [RFC v3 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Sia Jee Heng
2024-04-11 7:40 ` [RFC v3 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Stephen Boyd
2024-04-11 10:29 ` Conor Dooley
2024-04-12 3:00 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=44131080f148a472ed5dee901a66ffa7.sboyd@kernel.org \
--to=sboyd@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=hal.feng@starfivetech.com \
--cc=jeeheng.sia@starfivetech.com \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=leyfoon.tan@starfivetech.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=xingyu.wu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox