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d="scan'208";a="89392456" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 04:39:10 -0700 X-CSE-ConnectionGUID: 2TPjyhGPQZiAHJG0c9fjfw== X-CSE-MsgGUID: NAKZQ8CkQNyEdV234s4Dyg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,196,1770624000"; d="scan'208";a="234724405" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.120]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 04:39:05 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Fri, 24 Apr 2026 14:38:56 +0300 (EEST) To: Jia Wang cc: Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , LKML , linux-serial , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions In-Reply-To: <20260424-ultrarisc-serial-v4-2-1765a0b4c4a0@ultrarisc.com> Message-ID: <4548483c-cbba-899e-6b1a-1290d36b59cd@linux.intel.com> References: <20260424-ultrarisc-serial-v4-0-1765a0b4c4a0@ultrarisc.com> <20260424-ultrarisc-serial-v4-2-1765a0b4c4a0@ultrarisc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260424_123915_599784_56B961E2 X-CRM114-Status: GOOD ( 14.54 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 24 Apr 2026, Jia Wang wrote: > Replace the magic CPR value for Renesas RZ/N1 with a composition using > DW_UART_CPR_* bit/field definitions and FIELD_PREP_CONST(). > > Signed-off-by: Jia Wang > --- > drivers/tty/serial/8250/8250_dw.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c > index 467755bf0092..d3c2c9c84d9f 100644 > --- a/drivers/tty/serial/8250/8250_dw.c > +++ b/drivers/tty/serial/8250/8250_dw.c > @@ -937,7 +937,15 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = { > > static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { > .usr_reg = DW_UART_USR, > - .cpr_value = 0x00012f32, > + .cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) | > + DW_UART_CPR_AFCE_MODE | > + DW_UART_CPR_THRE_MODE | > + DW_UART_CPR_ADDITIONAL_FEATURES | > + DW_UART_CPR_FIFO_ACCESS | > + DW_UART_CPR_FIFO_STAT | > + DW_UART_CPR_SHADOW | > + DW_UART_CPR_DMA_EXTRA | > + FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, 0x01), Hmm, maybe there should also be macro also for this one which takes the fifosize as input and converts it to CPR field vlaue (effectively, the macro is an inverse of DW_UART_CPR_FIFO_SIZE()). It would be more readable than the literal. Also include BUILD_BUG_ON(!IS_ALIGNED(fifosize, 16) + bounds checks) inside that macro to catch invalid fifo sizes (+ don't forget the necessary headers for those two new things). -- i. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv