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[82.149.12.148]) by smtp.gmail.com with ESMTPSA id d18-20020a17090694d200b0099cb1a2cab0sm5322258ejy.28.2023.09.24.12.42.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Sep 2023 12:42:13 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: linux-riscv@lists.infradead.org, Conor Dooley Cc: conor@kernel.org, Conor Dooley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Chen-Yu Tsai , Samuel Holland , Daire McNamara , Geert Uytterhoeven , Magnus Damm , Emil Renner Berthing , Jisheng Zhang , Guo Ren , Fu Wei , Chen Wang , devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-renesas-soc@vger.kernel.org Subject: Re: [RFC v2 5/6] riscv: dts: allwinner: convert isa detection to new properties Date: Sun, 24 Sep 2023 21:42:12 +0200 Message-ID: <4833002.GXAFRqVoOG@jernej-laptop> In-Reply-To: <20230922081351.30239-7-conor@kernel.org> References: <20230922081351.30239-2-conor@kernel.org> <20230922081351.30239-7-conor@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230924_124216_011209_ACE11C85 X-CRM114-Status: GOOD ( 12.87 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Dne petek, 22. september 2023 ob 10:13:50 CEST je Conor Dooley napisal(a): > From: Conor Dooley > > Convert the D1 devicetrees to use the new properties > "riscv,isa-base" & "riscv,isa-extensions". > For compatibility with other projects, "riscv,isa" remains. > > Signed-off-by: Conor Dooley Acked-by: Jernej Skrabec Best regards, Jernej > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > index 8275630af977..947e975d2476 100644 > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > @@ -25,6 +25,9 @@ cpu0: cpu@0 { > mmu-type = "riscv,sv39"; > operating-points-v2 = <&opp_table_cpu>; > riscv,isa = "rv64imafdc"; > + riscv,isa-base = "rv64i"; > + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", > + "zifencei", "zihpm"; > #cooling-cells = <2>; > > cpu0_intc: interrupt-controller { > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv