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[5.147.80.91]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b76fcace8csm4135036f8f.54.2025.07.24.23.23.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Jul 2025 23:23:46 -0700 (PDT) Message-ID: <4ad699fc-a89d-4740-bdec-ecb9a2134c90@canonical.com> Date: Fri, 25 Jul 2025 08:23:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/11] riscv: update asm call site in `call_on_irq_stack` to setup correct label To: Deepak Gupta Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org, linux-mm@kvack.org, llvm@lists.linux.dev, rick.p.edgecombe@intel.com, broonie@kernel.org, cleger@rivosinc.com, samitolvanen@google.com, apatel@ventanamicro.com, ajones@ventanamicro.com, conor.dooley@microchip.com, charlie@rivosinc.com, samuel.holland@sifive.com, bjorn@rivosinc.com, fweimer@redhat.com, jeffreyalaw@gmail.com, andrew@sifive.com, ved@rivosinc.com, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Masahiro Yamada , Nathan Chancellor , Nicolas Schier , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Nick Desaulniers , Bill Wendling , Monk Chiang , Kito Cheng , Justin Stitt References: <20250724-riscv_kcfi-v1-0-04b8fa44c98c@rivosinc.com> <20250724-riscv_kcfi-v1-2-04b8fa44c98c@rivosinc.com> Content-Language: en-US From: Heinrich Schuchardt In-Reply-To: <20250724-riscv_kcfi-v1-2-04b8fa44c98c@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250724_232352_455849_84FA7D26 X-CRM114-Status: GOOD ( 16.37 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 25.07.25 01:36, Deepak Gupta wrote: > Call sites written in asm performing indirect call, they need to setup > label register (t2/x7) with correct label. > > Currently first kernel was compiled with `-save-temps` option and > normalized function signature string is captured and then placed at the > asm callsite. > > TODO: to write a macro wrapper with toolchain support. > > Signed-off-by: Deepak Gupta > --- > arch/riscv/kernel/entry.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 2660faf52232..598e17e800ae 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -389,6 +389,7 @@ SYM_FUNC_START(call_on_irq_stack) > load_per_cpu t0, irq_stack_ptr, t1 > li t1, IRQ_STACK_SIZE > add sp, t0, t1 > + lui t2, %lpad_hash("FvP7pt_regsE") In patch 1 you use lpad 0 due to missing tool support for signature hashing. Wouldn't it be preferable to have a first patch series introducing landing pad support with lpad 0 and once tool support for signature hashing has landed create a second patch series using tags? Such a first patch series would not have to be an RFC but might be merged soon. Best regards Heinrich > jalr a1 > > /* Switch back to the thread shadow call stack */ > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv