Re: [PATCH 1/4] RISC-V: create ISA string separately - not as part of cpuinfo

Andrew Jones
2023-04-26T09:45:06Z

On Mon, Apr 24, 2023 at 09:49:08PM +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@vrull.eu>
>
> The isa string is a very central part of the RISC-V architecture, so will
> be needed in other places as well.
>
> So in a first step decouple the generation of the runtime isa-string from
> /proc/cpuinfo - its current only user.
>
> The resulting string should not differ from the previously generated one.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> ---
> arch/riscv/kernel/cpu.c | 70 ++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 62 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 3df38052dcbd..ebc478f0a16c 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -193,10 +193,33 @@ static struct riscv_isa_ext_data isa_ext_arr[] = {
> __RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
> };
>
> -static void print_isa_ext(struct seq_file *f)
> +static int strlen_isa_ext(void)
> {
> struct riscv_isa_ext_data *edata;
> - int i = 0, arr_sz;
> + int ext_len = 0, i, arr_sz;
> +
> + arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;
> +
> + /* No extension support available */
> + if (arr_sz <= 0)
> + return 0;
> +
> + for (i = 0; i <= arr_sz; i++) {
> + edata = &isa_ext_arr[i];
> + if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))
> + continue;
> +
> + /* string length + underscore */
> + ext_len += strlen(edata->uprop) + 1;
> + }
> +
> + return ext_len;
> +}
> +
> +static void strcat_isa_ext(char *isa_str)
> +{
> + struct riscv_isa_ext_data *edata;
> + int i, arr_sz;
>
> arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;
>
> @@ -208,7 +231,8 @@ static void print_isa_ext(struct seq_file *f)
> edata = &isa_ext_arr[i];
> if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))
> continue;
> - seq_printf(f, "_%s", edata->uprop);
> + strcat(isa_str, "_");
> + strcat(isa_str, edata->uprop);
> }
> }
>
> @@ -220,19 +244,49 @@ static void print_isa_ext(struct seq_file *f)
> */
> static const char base_riscv_exts[13] = "imafdqcbkjpvh";
>
> -static void print_isa(struct seq_file *f, const char *isa)
> +static char *riscv_create_isa_string(const char *isa)
> {
> + int maxlen = 4;
> + char *isa_str;
> int i;
>
> - seq_puts(f, "isa\t\t: ");
> + /* calculate the needed string length */
> + for (i = 0; i < sizeof(base_riscv_exts); i++)
> + if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))
> + maxlen++;
> + maxlen += strlen_isa_ext();
> +
> + isa_str = kzalloc(maxlen, GFP_KERNEL);
> + if (!isa_str)
> + return ERR_PTR(-ENOMEM);
> +
> /* Print the rv[64/32] part */
> - seq_write(f, isa, 4);
> + strncat(isa_str, isa, 4);
> +
> for (i = 0; i < sizeof(base_riscv_exts); i++) {
> if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))
> /* Print only enabled the base ISA extensions */
> - seq_write(f, &base_riscv_exts[i], 1);
> + strncat(isa_str, &base_riscv_exts[i], 1);
> + }
> +
> + strcat_isa_ext(isa_str);
> +
> + return isa_str;
> +}
> +
> +static void print_isa(struct seq_file *f, const char *isa)
> +{
> + char *isa_str;
> +
> + seq_puts(f, "isa\t\t: ");
> +
> + isa_str = riscv_create_isa_string(isa);

Shouldn't there be another patch in this series that switches this
to using the new riscv_base_platform. The allocation/regeneration/freeing
doesn't seem necessary each time we cat cpuinfo.

Thanks,
drew

> + if (!IS_ERR(isa_str)) {
> + seq_write(f, isa_str, strlen(isa_str));
> + kfree(isa_str);
> + } else {
> + seq_puts(f, "unknown");
> }
> - print_isa_ext(f);
> seq_puts(f, "\n");
> }
>
> --
> 2.39.0
>
>
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