* [PATCH v1] riscv : support update_mmu_tlb() for riscv
@ 2022-09-06 12:19 Jinyu Tang
2022-09-06 14:41 ` Andrew Jones
0 siblings, 1 reply; 5+ messages in thread
From: Jinyu Tang @ 2022-09-06 12:19 UTC (permalink / raw)
To: paul.walmsley, palmer, aou, conor.dooley, anup, alexandre.ghiti,
guoren, akpm, heiko, tongtiangen, sunnanyong
Cc: linux-riscv, linux-kernel, falcon, tjytimi
Add macro definition to support updata_mmu_tlb() for riscv,
this function is from commit:7df676974359 ("mm/memory.c:Update
local TLB if PTE entry exists").
Signed-off-by: Jinyu Tang <tjytimi@163.com>
---
arch/riscv/include/asm/pgtable.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 7ec936910a96..84a791d54f95 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
local_flush_tlb_page(address);
}
+#define __HAVE_ARCH_UPDATE_MMU_TLB
+#define update_mmu_tlb update_mmu_cache
+
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
unsigned long address, pmd_t *pmdp)
{
--
2.30.2
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v1] riscv : support update_mmu_tlb() for riscv
2022-09-06 12:19 [PATCH v1] riscv : support update_mmu_tlb() for riscv Jinyu Tang
@ 2022-09-06 14:41 ` Andrew Jones
2022-09-06 15:25 ` Conor.Dooley
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Andrew Jones @ 2022-09-06 14:41 UTC (permalink / raw)
To: Jinyu Tang
Cc: paul.walmsley, palmer, aou, conor.dooley, anup, alexandre.ghiti,
guoren, akpm, heiko, tongtiangen, sunnanyong, linux-riscv,
linux-kernel, falcon
On Tue, Sep 06, 2022 at 08:19:21PM +0800, Jinyu Tang wrote:
> Add macro definition to support updata_mmu_tlb() for riscv,
> this function is from commit:7df676974359 ("mm/memory.c:Update
> local TLB if PTE entry exists").
>
> Signed-off-by: Jinyu Tang <tjytimi@163.com>
> ---
> arch/riscv/include/asm/pgtable.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 7ec936910a96..84a791d54f95 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
> local_flush_tlb_page(address);
> }
>
> +#define __HAVE_ARCH_UPDATE_MMU_TLB
^ just a single space here, please, as all the other
'define __HAVE's in this file
> +#define update_mmu_tlb update_mmu_cache
> +
> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
> unsigned long address, pmd_t *pmdp)
> {
> --
> 2.30.2
This seems like the right thing to do, so
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
I'm curious if this patch is the result of debugging something? Or what
led you to post it?
Thanks,
drew
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1] riscv : support update_mmu_tlb() for riscv
2022-09-06 14:41 ` Andrew Jones
@ 2022-09-06 15:25 ` Conor.Dooley
2022-09-18 5:39 ` Jinyu Tang
2022-09-18 5:43 ` Jinyu Tang
2 siblings, 0 replies; 5+ messages in thread
From: Conor.Dooley @ 2022-09-06 15:25 UTC (permalink / raw)
To: ajones, tjytimi
Cc: paul.walmsley, palmer, aou, anup, alexandre.ghiti, guoren, akpm,
heiko, tongtiangen, sunnanyong, linux-riscv, linux-kernel, falcon
On 06/09/2022 15:41, Andrew Jones wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Sep 06, 2022 at 08:19:21PM +0800, Jinyu Tang wrote:
> [PATCH v1] riscv : support update_mmu_tlb() for riscv
Another nit to fix when you sort out Drew's request below,
drop the space between riscv & : please.
Thanks,
Conor.
>> Add macro definition to support updata_mmu_tlb() for riscv,
>> this function is from commit:7df676974359 ("mm/memory.c:Update
>> local TLB if PTE entry exists").
>>
>> Signed-off-by: Jinyu Tang <tjytimi@163.com>
>> ---
>> arch/riscv/include/asm/pgtable.h | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
>> index 7ec936910a96..84a791d54f95 100644
>> --- a/arch/riscv/include/asm/pgtable.h
>> +++ b/arch/riscv/include/asm/pgtable.h
>> @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
>> local_flush_tlb_page(address);
>> }
>>
>> +#define __HAVE_ARCH_UPDATE_MMU_TLB
> ^ just a single space here, please, as all the other
> 'define __HAVE's in this file
>
>> +#define update_mmu_tlb update_mmu_cache
>> +
>> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
>> unsigned long address, pmd_t *pmdp)
>> {
>> --
>> 2.30.2
>
> This seems like the right thing to do, so
>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
>
> I'm curious if this patch is the result of debugging something? Or what
> led you to post it?
>
> Thanks,
> drew
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re:Re: [PATCH v1] riscv : support update_mmu_tlb() for riscv
2022-09-06 14:41 ` Andrew Jones
2022-09-06 15:25 ` Conor.Dooley
@ 2022-09-18 5:39 ` Jinyu Tang
2022-09-18 5:43 ` Jinyu Tang
2 siblings, 0 replies; 5+ messages in thread
From: Jinyu Tang @ 2022-09-18 5:39 UTC (permalink / raw)
To: ajones
Cc: akpm, alexandre.ghiti, anup, aou, conor.dooley, falcon, guoren,
heiko, linux-kernel, linux-riscv, palmer, paul.walmsley,
sunnanyong, tjytimi, tongtiangen
Jinyu
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re:Re: [PATCH v1] riscv : support update_mmu_tlb() for riscv
2022-09-06 14:41 ` Andrew Jones
2022-09-06 15:25 ` Conor.Dooley
2022-09-18 5:39 ` Jinyu Tang
@ 2022-09-18 5:43 ` Jinyu Tang
2 siblings, 0 replies; 5+ messages in thread
From: Jinyu Tang @ 2022-09-18 5:43 UTC (permalink / raw)
To: ajones
Cc: akpm, alexandre.ghiti, anup, aou, conor.dooley, falcon, guoren,
heiko, linux-kernel, linux-riscv, palmer, paul.walmsley,
sunnanyong, tjytimi, tongtiangen
Jinyu
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
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2022-09-06 12:19 [PATCH v1] riscv : support update_mmu_tlb() for riscv Jinyu Tang
2022-09-06 14:41 ` Andrew Jones
2022-09-06 15:25 ` Conor.Dooley
2022-09-18 5:39 ` Jinyu Tang
2022-09-18 5:43 ` Jinyu Tang
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