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[82.149.1.233]) by smtp.gmail.com with ESMTPSA id u13-20020a5d514d000000b003172510d19dsm11132401wrt.73.2023.07.30.15.04.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 30 Jul 2023 15:04:01 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: linux-sunxi@lists.linux.dev, John Watts Cc: Wolfgang Grandegger , Marc Kleine-Budde , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-can@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes Date: Mon, 31 Jul 2023 00:03:59 +0200 Message-ID: <5694691.DvuYhMxLoT@jernej-laptop> In-Reply-To: References: <20230721221552.1973203-2-contact@jookia.org> <20230721221552.1973203-4-contact@jookia.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230730_150405_272098_70D0AFDD X-CRM114-Status: GOOD ( 14.05 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Dne nedelja, 23. julij 2023 ob 11:18:33 CEST je John Watts napisal(a): > On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote: > > ... > > + /omit-if-no-ref/ > > + can0_pins: can0-pins { > > + pins = "PB2", "PB3"; > > + function = "can0"; > > + }; > > ... > > + can0: can@2504000 { > > + compatible = "allwinner,sun20i-d1-can"; > > + reg = <0x02504000 0x400>; > > + interrupts = ; > > + clocks = <&ccu CLK_BUS_CAN0>; > > + resets = <&ccu RST_BUS_CAN0>; > > + status = "disabled"; > > + }; > > Just a quick late night question to people with more knowledge than me: > > These chips only have one pinctrl configuration for can0 and can1. Should > the can nodes have this pre-set instead of the board dts doing this? Yes, that's usually how it's done. > > I see this happening in sun4i-a10.dtsi for instance, but it also seems like > it could become a problem when it comes to re-using the dtsi for newer chip > variants. Properties can be either rewritten or deleted further down, so don't worry about that. Best regards, Jernej > > John. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv