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([2804:1b3:a803:c91:da45:7fbc:86c3:920a]) by smtp.gmail.com with ESMTPSA id l17-20020a05683016d100b006b95392cf09sm3318989otr.33.2023.09.11.12.05.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Sep 2023 12:05:28 -0700 (PDT) Message-ID: <5c082cb1fd306cb75abbcaa80229d791260f8756.camel@redhat.com> Subject: Re: [PATCH V11 01/17] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock From: Leonardo =?ISO-8859-1?Q?Br=E1s?= To: guoren@kernel.org, paul.walmsley@sifive.com, anup@brainfault.org, peterz@infradead.org, mingo@redhat.com, will@kernel.org, palmer@rivosinc.com, longman@redhat.com, boqun.feng@gmail.com, tglx@linutronix.de, paulmck@kernel.org, rostedt@goodmis.org, rdunlap@infradead.org, catalin.marinas@arm.com, conor.dooley@microchip.com, xiaoguang.xing@sophgo.com, bjorn@rivosinc.com, alexghiti@rivosinc.com, keescook@chromium.org, greentime.hu@sifive.com, ajones@ventanamicro.com, jszhang@kernel.org, wefu@redhat.com, wuwei2016@iscas.ac.cn Cc: linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org, linux-csky@vger.kernel.org, Guo Ren Date: Mon, 11 Sep 2023 16:05:20 -0300 In-Reply-To: <20230910082911.3378782-2-guoren@kernel.org> References: <20230910082911.3378782-1-guoren@kernel.org> <20230910082911.3378782-2-guoren@kernel.org> User-Agent: Evolution 3.48.4 MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230911_120534_918461_38EC8C84 X-CRM114-Status: GOOD ( 22.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Sun, 2023-09-10 at 04:28 -0400, guoren@kernel.org wrote: > From: Guo Ren > > The arch_spinlock_t of qspinlock has contained the atomic_t val, which > satisfies the ticket-lock requirement. Thus, unify the arch_spinlock_t > into qspinlock_types.h. This is the preparation for the next combo > spinlock. > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > --- > include/asm-generic/spinlock.h | 14 +++++++------- > include/asm-generic/spinlock_types.h | 12 ++---------- > 2 files changed, 9 insertions(+), 17 deletions(-) > > diff --git a/include/asm-generic/spinlock.h b/include/asm-generic/spinlock.h > index 90803a826ba0..4773334ee638 100644 > --- a/include/asm-generic/spinlock.h > +++ b/include/asm-generic/spinlock.h > @@ -32,7 +32,7 @@ > > static __always_inline void arch_spin_lock(arch_spinlock_t *lock) > { > - u32 val = atomic_fetch_add(1<<16, lock); > + u32 val = atomic_fetch_add(1<<16, &lock->val); > u16 ticket = val >> 16; > > if (ticket == (u16)val) > @@ -46,31 +46,31 @@ static __always_inline void arch_spin_lock(arch_spinlock_t *lock) > * have no outstanding writes due to the atomic_fetch_add() the extra > * orderings are free. > */ > - atomic_cond_read_acquire(lock, ticket == (u16)VAL); > + atomic_cond_read_acquire(&lock->val, ticket == (u16)VAL); > smp_mb(); > } > > static __always_inline bool arch_spin_trylock(arch_spinlock_t *lock) > { > - u32 old = atomic_read(lock); > + u32 old = atomic_read(&lock->val); > > if ((old >> 16) != (old & 0xffff)) > return false; > > - return atomic_try_cmpxchg(lock, &old, old + (1<<16)); /* SC, for RCsc */ > + return atomic_try_cmpxchg(&lock->val, &old, old + (1<<16)); /* SC, for RCsc */ > } > > static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) > { > u16 *ptr = (u16 *)lock + IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); > - u32 val = atomic_read(lock); > + u32 val = atomic_read(&lock->val); > > smp_store_release(ptr, (u16)val + 1); > } > > static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock) > { > - u32 val = lock.counter; > + u32 val = lock.val.counter; > > return ((val >> 16) == (val & 0xffff)); > } This one seems to be different in torvalds/master, but I suppose it's because of the requirement patches I have not merged. > @@ -84,7 +84,7 @@ static __always_inline int arch_spin_is_locked(arch_spinlock_t *lock) > > static __always_inline int arch_spin_is_contended(arch_spinlock_t *lock) > { > - u32 val = atomic_read(lock); > + u32 val = atomic_read(&lock->val); > > return (s16)((val >> 16) - (val & 0xffff)) > 1; > } > diff --git a/include/asm-generic/spinlock_types.h b/include/asm-generic/spinlock_types.h > index 8962bb730945..f534aa5de394 100644 > --- a/include/asm-generic/spinlock_types.h > +++ b/include/asm-generic/spinlock_types.h > @@ -3,15 +3,7 @@ > #ifndef __ASM_GENERIC_SPINLOCK_TYPES_H > #define __ASM_GENERIC_SPINLOCK_TYPES_H > > -#include > -typedef atomic_t arch_spinlock_t; > - > -/* > - * qrwlock_types depends on arch_spinlock_t, so we must typedef that before the > - * include. > - */ > -#include > - > -#define __ARCH_SPIN_LOCK_UNLOCKED ATOMIC_INIT(0) > +#include > +#include > > #endif /* __ASM_GENERIC_SPINLOCK_TYPES_H */ FWIW, LGTM: Reviewed-by: Leonardo Bras Just a suggestion: In this patch I could see a lot of usage changes to arch_spinlock_t, and only at the end I could see the actual change in the .h file. In cases like this, it looks nicer to see the .h file first. I recently found out about this git diff.orderFile option, which helps to achieve exactly this. I use the following git.orderfile, adapted from qemu: ############################################################################ # # order file for git, to produce patches which are easier to review # by diffing the important stuff like interface changes first. # # one-off usage: # git diff -O scripts/git.orderfile ... # # add to git config: # git config diff.orderFile scripts/git.orderfile # MAINTAINERS # Documentation Documentation/* *.rst *.rst.inc # build system Kbuild Makefile* *.mak # semantic patches *.cocci # headers *.h *.h.inc # code *.c *.c.inc _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv