Re: [PATCH v2 01/15] riscv: add Firmware Feature (FWFT) SBI extensions definitions

From: Samuel Holland <samuel.holland@sifive.com>
To: "Deepak Gupta" <debug@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v2 01/15] riscv: add Firmware Feature (FWFT) SBI extensions definitions
Date: Mon, 10 Feb 2025 22:31:35 -0600	[thread overview]
Message-ID: <6223225b-a7cf-452d-ae69-d895b5f23d62@sifive.com> (raw)
In-Reply-To: <Z6rMtBud/hsKYYIw@debug.ba.rivosinc.com>

Hi Deepak,

On 2025-02-10 10:06 PM, Deepak Gupta wrote:
> On Mon, Feb 10, 2025 at 10:35:34PM +0100, Clément Léger wrote:
>> The Firmware Features extension (FWFT) was added as part of the SBI 3.0
>> specification. Add SBI definitions to use this extension.
>>
>> Signed-off-by: Clément Léger <cleger@rivosinc.com>
>> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
>> Tested-by: Samuel Holland <samuel.holland@sifive.com>
>> ---
>> arch/riscv/include/asm/sbi.h | 33 +++++++++++++++++++++++++++++++++
>> 1 file changed, 33 insertions(+)
>>
>> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
>> index 3d250824178b..d373b5c08039 100644
>> --- a/arch/riscv/include/asm/sbi.h
>> +++ b/arch/riscv/include/asm/sbi.h
>> @@ -35,6 +35,7 @@ enum sbi_ext_id {
>>     SBI_EXT_DBCN = 0x4442434E,
>>     SBI_EXT_STA = 0x535441,
>>     SBI_EXT_NACL = 0x4E41434C,
>> +    SBI_EXT_FWFT = 0x46574654,
>>
>>     /* Experimentals extensions must lie within this range */
>>     SBI_EXT_EXPERIMENTAL_START = 0x08000000,
>> @@ -402,6 +403,33 @@ enum sbi_ext_nacl_feature {
>> #define SBI_NACL_SHMEM_SRET_X(__i)        ((__riscv_xlen / 8) * (__i))
>> #define SBI_NACL_SHMEM_SRET_X_LAST        31
>>
>> +/* SBI function IDs for FW feature extension */
>> +#define SBI_EXT_FWFT_SET        0x0
>> +#define SBI_EXT_FWFT_GET        0x1
>> +
>> +enum sbi_fwft_feature_t {
>> +    SBI_FWFT_MISALIGNED_EXC_DELEG        = 0x0,
>> +    SBI_FWFT_LANDING_PAD            = 0x1,
>> +    SBI_FWFT_SHADOW_STACK            = 0x2,
>> +    SBI_FWFT_DOUBLE_TRAP            = 0x3,
>> +    SBI_FWFT_PTE_AD_HW_UPDATING        = 0x4,
>> +    SBI_FWFT_POINTER_MASKING_PMLEN        = 0x5,
>> +    SBI_FWFT_LOCAL_RESERVED_START        = 0x6,
>> +    SBI_FWFT_LOCAL_RESERVED_END        = 0x3fffffff,
>> +    SBI_FWFT_LOCAL_PLATFORM_START        = 0x40000000,
>> +    SBI_FWFT_LOCAL_PLATFORM_END        = 0x7fffffff,
>> +
>> +    SBI_FWFT_GLOBAL_RESERVED_START        = 0x80000000,
>> +    SBI_FWFT_GLOBAL_RESERVED_END        = 0xbfffffff,
>> +    SBI_FWFT_GLOBAL_PLATFORM_START        = 0xc0000000,
>> +    SBI_FWFT_GLOBAL_PLATFORM_END        = 0xffffffff,
>> +};
>> +
>> +#define SBI_FWFT_PLATFORM_FEATURE_BIT        (1 << 30)
>> +#define SBI_FWFT_GLOBAL_FEATURE_BIT        (1 << 31)
>> +
>> +#define SBI_FWFT_SET_FLAG_LOCK            (1 << 0)
>> +
>> /* SBI spec version fields */
>> #define SBI_SPEC_VERSION_DEFAULT    0x1
>> #define SBI_SPEC_VERSION_MAJOR_SHIFT    24
>> @@ -419,6 +447,11 @@ enum sbi_ext_nacl_feature {
>> #define SBI_ERR_ALREADY_STARTED -7
>> #define SBI_ERR_ALREADY_STOPPED -8
>> #define SBI_ERR_NO_SHMEM    -9
>> +#define SBI_ERR_INVALID_STATE    -10
>> +#define SBI_ERR_BAD_RANGE    -11
>> +#define SBI_ERR_TIMEOUT        -12
> 
> nit: Space mis-aligned(^)    ^

The alignment is correct when the patch is applied. It only looks wrong in the
patch because the "+" from the unified diff format causes an overflow to the
next tab stop.

Regards,
Samuel

> otherwise
> Reviewed-by: Deepak Gupta <debug@rivosinc.com>
> 
>> +#define SBI_ERR_IO        -13
>> +#define SBI_ERR_DENIED_LOCKED    -14
>>
>> extern unsigned long sbi_spec_version;
>> struct sbiret {
>> -- 
>> 2.47.2
>>
>>

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