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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id b13sm1929260lfb.145.2021.11.08.13.13.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Nov 2021 13:13:12 -0800 (PST) Message-ID: <632cb889-114b-2b44-3a75-e4b9e5bd0bda@canonical.com> Date: Mon, 8 Nov 2021 22:13:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.1 Subject: Re: [PATCH 05/13] dt-bindings: i2c: add bindings for microchip mpfs i2c Content-Language: en-US To: conor.dooley@microchip.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, a.zummo@towertech.it, alexandre.belloni@bootlin.com, broonie@kernel.org, gregkh@linuxfoundation.org, lewis.hanly@microchip.com, daire.mcnamara@microchip.com, atish.patra@wdc.com, ivan.griffin@microchip.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-riscv@lists.infradead.org, linux-crypto@vger.kernel.org, linux-rtc@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org Cc: geert@linux-m68k.org, bin.meng@windriver.com References: <20211108150554.4457-1-conor.dooley@microchip.com> <20211108150554.4457-6-conor.dooley@microchip.com> From: Krzysztof Kozlowski In-Reply-To: <20211108150554.4457-6-conor.dooley@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211108_131314_547001_5BB4A464 X-CRM114-Status: GOOD ( 19.63 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 08/11/2021 16:05, conor.dooley@microchip.com wrote: > From: Conor Dooley > > Add device tree bindings for the i2c controller on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley > Signed-off-by: Daire McNamara > --- > .../bindings/i2c/microchip,mpfs-i2c.yaml | 74 +++++++++++++++++++ > 1 file changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml > > diff --git a/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml > new file mode 100644 > index 000000000000..bc4ea4498d35 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/i2c/microchip,mpfs-i2c.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip MPFS I2C Controller Device Tree Bindings > + > +maintainers: > + - Daire McNamara > + > +description: | > + This I2C controller is found on the Microchip PolarFire SoC. > + > +allOf: > + - $ref: /schemas/i2c/i2c-controller.yaml# > + > +properties: > + compatible: > + enum: > + - microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + description: Phandle of the clock feeding the I2C controller. Skip such descriptions here and in other patches - they do not introduce any meaningful information. > + minItems: 1 Define instead exact number of clocks or maxItems... but why would they be variable? > + > + clock-frequency: > + description: | > + Desired I2C bus clock frequency in Hz. As only Standard and Fast > + modes are supported, possible values are 100000 and 400000. > + enum: [100000, 400000] > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + i2c@2010a000 { > + compatible = "microchip,mpfs-i2c"; > + reg = <0 0x2010a000 0 0x1000>; > + interrupts = <58>; > + clock-frequency = <100000>; > + clocks = <&clkcfg CLK_I2C0>; > + }; > + }; > + - | > + #include > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + i2c@2010b000 { > + compatible = "microchip,mpfs-i2c"; > + reg = <0 0x2010b000 0 0x1000>; > + interrupts = <61>; > + clock-frequency = <100000>; > + clocks = <&clkcfg CLK_I2C1>; This is the same example as above, just with changed numbers. Skip it. > + }; > + }; > +... > Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv