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From: "Heiko Stübner" <heiko@sntech.de>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	christoph.muellner@vrull.eu, prabhakar.csengg@gmail.com,
	conor@kernel.org, philipp.tomsich@vrull.eu,
	emil.renner.berthing@canonical.com, jszhang@kernel.org
Subject: Re: [PATCH v4 11/12] RISC-V: add helpers for handling immediates in U-type and I-type pairs
Date: Thu, 22 Dec 2022 14:46:58 +0100	[thread overview]
Message-ID: <6487607.lOV4Wx5bFT@diego> (raw)
In-Reply-To: <20221208143811.tluvayxdc5g4bw3e@kamzik>

Am Donnerstag, 8. Dezember 2022, 15:38:11 CET schrieb Andrew Jones:
> On Wed, Dec 07, 2022 at 07:08:20PM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > 
> > Used together U-type and I-type instructions can for example be used to
> > generate bigger jumps (i.e. in auipc+jalr pairs) by splitting the value
> > into an upper immediate (i.e. auipc) and a 12bit immediate (i.e. jalr).
> > 
> > Due to both immediates being considered signed this creates some corner
> > cases, so add some helper to prevent this from getting duplicated in
> > different places.
> > 
> > Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > ---
> >  arch/riscv/include/asm/insn.h | 47 +++++++++++++++++++++++++++++++++++
> >  1 file changed, 47 insertions(+)
> > 
> > diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h
> > index 2a23890b4577..bb1e6120a560 100644
> > --- a/arch/riscv/include/asm/insn.h
> > +++ b/arch/riscv/include/asm/insn.h
> > @@ -290,3 +290,50 @@ static __always_inline bool riscv_insn_is_branch(u32 code)
> >  	(RVC_X(x_, RVC_B_IMM_5_OPOFF, RVC_B_IMM_5_MASK) << RVC_B_IMM_5_OFF) | \
> >  	(RVC_X(x_, RVC_B_IMM_7_6_OPOFF, RVC_B_IMM_7_6_MASK) << RVC_B_IMM_7_6_OFF) | \
> >  	(RVC_IMM_SIGN(x_) << RVC_B_IMM_SIGN_OFF); })
> > +
> > +/*
> > + * Put together one immediate from a U-type and I-type instruction pair.
> > + *
> > + * The U-type contains an upper immediate, meaning bits[31:12] with [11:0]
> > + * being zero, while the I-type contains a 12bit immediate.
> > + * Combined these can encode larger 32bit values and are used for example
> > + * in auipc + jalr pairs to allow larger jumps.
> > + *
> > + * @utype_insn: instruction containing the upper immediate
> > + * @itype_insn: instruction
> > + * Return: combined immediate
> > + */
> > +static inline s32 riscv_insn_extract_utype_itype_imm(u32 utype_insn, u32 itype_insn)
> 
> Might be nice to keep the interfaces of these two complementing functions
> consistent by taking a u32 *insn here, like below. Or, below, taking
> &utype_insn and &itype_insn, like here.

I did go with separating the instructions in the insert function, simply
because I think it's way nicer to not impose the fixed structure
(2 u32 array) on every possible caller .

Heiko



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  reply	other threads:[~2022-12-22 14:04 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-07 18:08 [PATCH v4 00/12] Allow calls in alternatives Heiko Stuebner
2022-12-07 18:08 ` [PATCH v4 01/12] RISC-V: fix funct4 definition for c.jalr in parse_asm.h Heiko Stuebner
2022-12-10 12:34   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 02/12] RISC-V: add prefix to all constants/macros " Heiko Stuebner
2022-12-10 12:45   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 03/12] RISC-V: detach funct-values from their offset Heiko Stuebner
2022-12-10 22:16   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 04/12] RISC-V: add ebreak instructions to definitions Heiko Stuebner
2022-12-10 23:08   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 05/12] RISC-V: add auipc elements to parse_asm header Heiko Stuebner
2022-12-10 23:28   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 06/12] RISC-V: Move riscv_insn_is_* macros into a common header Heiko Stuebner
2022-12-11 17:32   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 07/12] RISC-V: rename parse_asm.h to insn.h Heiko Stuebner
2022-12-11 17:33   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 08/12] RISC-V: kprobes: use central defined funct3 constants Heiko Stuebner
2022-12-11 17:34   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 09/12] RISC-V: add U-type imm parsing to insn.h header Heiko Stuebner
2022-12-11 17:36   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 10/12] RISC-V: add rd reg " Heiko Stuebner
2022-12-11 17:41   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 11/12] RISC-V: add helpers for handling immediates in U-type and I-type pairs Heiko Stuebner
2022-12-07 20:07   ` Conor Dooley
2022-12-07 22:43     ` Heiko Stuebner
2022-12-08 14:38   ` Andrew Jones
2022-12-22 13:46     ` Heiko Stübner [this message]
2022-12-11 20:45   ` Lad, Prabhakar
2022-12-07 18:08 ` [PATCH v4 12/12] RISC-V: fix auipc-jalr addresses in patched alternatives Heiko Stuebner
2022-12-07 20:48   ` Conor Dooley
2022-12-07 22:00     ` Jessica Clarke
2022-12-07 22:04       ` Conor Dooley
2022-12-07 22:37     ` Heiko Stuebner
2022-12-08  5:03       ` Conor.Dooley
2022-12-08 14:47   ` Andrew Jones
2022-12-11 20:49   ` Lad, Prabhakar

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