From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: "Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atish.patra@linux.dev>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <anup@brainfault.org>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 04/13] RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init()
Date: Fri, 6 Jun 2025 12:14:43 +0800 [thread overview]
Message-ID: <670cf57f-775e-43e1-abc3-189f3e0dc35c@lanxincomputing.com> (raw)
In-Reply-To: <20250605061458.196003-5-apatel@ventanamicro.com>
On 6/5/2025 2:14 PM, Anup Patel wrote:
> The kvm_riscv_vcpu_aia_init() does not return any failure so drop
> the return value which is always zero.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_aia.h | 2 +-
> arch/riscv/kvm/aia_device.c | 6 ++----
> arch/riscv/kvm/vcpu.c | 4 +---
> 3 files changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kvm_aia.h b/arch/riscv/include/asm/kvm_aia.h
> index 3b643b9efc07..0a0f12496f00 100644
> --- a/arch/riscv/include/asm/kvm_aia.h
> +++ b/arch/riscv/include/asm/kvm_aia.h
> @@ -147,7 +147,7 @@ int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num,
>
> int kvm_riscv_vcpu_aia_update(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_aia_reset(struct kvm_vcpu *vcpu);
> -int kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu);
> +void kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu);
> void kvm_riscv_vcpu_aia_deinit(struct kvm_vcpu *vcpu);
>
> int kvm_riscv_aia_inject_msi_by_id(struct kvm *kvm, u32 hart_index,
> diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c
> index 43e472ff3e1a..5b7ed2d987db 100644
> --- a/arch/riscv/kvm/aia_device.c
> +++ b/arch/riscv/kvm/aia_device.c
> @@ -539,12 +539,12 @@ void kvm_riscv_vcpu_aia_reset(struct kvm_vcpu *vcpu)
> kvm_riscv_vcpu_aia_imsic_reset(vcpu);
> }
>
> -int kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu)
> +void kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu)
> {
> struct kvm_vcpu_aia *vaia = &vcpu->arch.aia_context;
>
> if (!kvm_riscv_aia_available())
> - return 0;
> + return;
>
> /*
> * We don't do any memory allocations over here because these
> @@ -556,8 +556,6 @@ int kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu)
> /* Initialize default values in AIA vcpu context */
> vaia->imsic_addr = KVM_RISCV_AIA_UNDEF_ADDR;
> vaia->hart_index = vcpu->vcpu_idx;
> -
> - return 0;
> }
>
> void kvm_riscv_vcpu_aia_deinit(struct kvm_vcpu *vcpu)
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 6a1914b21ec3..f98a1894d55b 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -160,9 +160,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
> kvm_riscv_vcpu_pmu_init(vcpu);
>
> /* Setup VCPU AIA */
> - rc = kvm_riscv_vcpu_aia_init(vcpu);
> - if (rc)
> - return rc;
> + kvm_riscv_vcpu_aia_init(vcpu);
>
Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com>
This seems more reasonable.
Thanks,
Nutty
> /*
> * Setup SBI extensions
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next prev parent reply other threads:[~2025-06-06 4:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-05 6:14 [PATCH 00/13] MMU related improvements for KVM RISC-V Anup Patel
2025-06-05 6:14 ` [PATCH 01/13] RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls Anup Patel
2025-06-06 0:00 ` Atish Patra
2025-06-09 4:43 ` Anup Patel
2025-06-05 6:14 ` [PATCH 02/13] RISC-V: KVM: Don't treat SBI HFENCE calls as NOPs Anup Patel
2025-06-06 0:11 ` Atish Patra
2025-06-09 4:43 ` Anup Patel
2025-06-05 6:14 ` [PATCH 03/13] RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value Anup Patel
2025-06-06 0:16 ` Atish Patra
2025-06-09 5:01 ` Anup Patel
2025-06-05 6:14 ` [PATCH 04/13] RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() Anup Patel
2025-06-06 0:52 ` Atish Patra
2025-06-06 4:14 ` Nutty Liu [this message]
2025-06-05 6:14 ` [PATCH 05/13] RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize() Anup Patel
2025-06-06 1:21 ` Atish Patra
2025-06-06 4:25 ` Nutty Liu
2025-06-05 6:14 ` [PATCH 06/13] RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH Anup Patel
2025-06-06 1:24 ` Atish Patra
2025-06-05 6:14 ` [PATCH 07/13] RISC-V: KVM: Don't flush TLB in gstage_set_pte() when PTE is unchanged Anup Patel
2025-06-05 6:14 ` [PATCH 08/13] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range() Anup Patel
2025-06-05 6:14 ` [PATCH 09/13] RISC-V: KVM: Factor-out MMU related declarations into separate headers Anup Patel
2025-06-05 6:14 ` [PATCH 10/13] RISC-V: KVM: Introduce struct kvm_gstage_mapping Anup Patel
2025-06-05 6:14 ` [PATCH 11/13] RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence Anup Patel
2025-06-05 6:14 ` [PATCH 12/13] RISC-V: KVM: Factor-out g-stage page table management Anup Patel
2025-06-05 6:14 ` [PATCH 13/13] RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs Anup Patel
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