From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F2C2CA5FF1 for ; Wed, 7 Oct 2026 11:01:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7B/V7rJpML7jROGSrt/q0WYB6JzczbbQfaxyHMd5j6Q=; b=4lUj5oUrIfmqFi J06iQHP/p68EFyYf9PyzoG57gkQBNU2T2qt/Rh9QWxE9JFkJv8i2VeLQ3PbI3IUCD6qIgz7weR/HV oszM8eAOWGGSV13e2ZlLDkYJZYhYdNnA3Bf7/HhWX43BDjCfBj3/Lj8K1LyYSoSMV2CyCaotK00QV Fb6bx3xeSvQ68bCJ88ucdLjeVmguA005vIv09dM7ME7bw+VlA+SwcvooQy1Uvh1QB1O0kOpn5F/Xs m/KHAiAv20QOkW1ucN6kEV1PoHVC9yUtGSISVe/NCIw7Bt1/2Y+vW1ziKTT0nZiqnPaVyv/XFp74J VOSEEpvryYAf/2xDFUjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEPOq-00000002G7b-253A; Wed, 07 Oct 2026 11:01:28 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEPOp-00000002G73-1RAg for linux-riscv@lists.infradead.org; Wed, 07 Oct 2026 11:01:27 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 9E5A06021A; Wed, 7 Oct 2026 11:01:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF84F1F0089B; Wed, 7 Oct 2026 11:01:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791370885; bh=oj+jPv+W3w4mQ53IZPa0Z9z2WElXYSTGhTs8GSivQOQ=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=RyDAibe96Eq/7kf+TLq5bawmi37igOsg/UMj3h8nppbsBm4/0BO4DS9C2Kmn7qeq3 crVliEz67Dwxbp9KPAmewYN2KaM+5HN7ehBeEKXZI74Xw84Djzhpd/ITtoOSeurzKB imskknXHsIhAMXD/TE5ljilnge8SW0Wh247bO3Ay4in9N2UkzDsYFGgHb8+ZWppYzh filExIkMvEToz8TregUkBzcU001evOU1KzpRqu5vrtMAbVHO+9I6FerFDmaUHxsOi/ pcdYAXjNqgTu2kZsGVcs0lNsaffA54L13s20tpZzce4SVc/Eq0pYWzxFH5QuHIR+iK 1sF4YNgtGwp/w== Message-ID: <69c33490-e5a3-4cf2-a5ed-d2bc8ed336d2@kernel.org> Date: Wed, 7 Oct 2026 13:01:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] riscv/mm: fix soft-dirty migration PMDs being treated as present To: Lance Yang Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, akpm@linux-foundation.org, zhangchunyan@iscas.ac.cn, rppt@kernel.org, kas@kernel.org, andrew+kernel@donnellan.id.au, rmclure@linux.ibm.com, debug@rivosinc.com, baolin.wang@linux.alibaba.com, usama.arif@linux.dev, wangruikang@iscas.ac.cn, namcao@linutronix.de, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, alexghiti@rivosinc.com, viro@zeniv.linux.org.uk, ajones@ventanamicro.com, arnd@arndb.de, axelrasmussen@google.com, brauner@kernel.org, conor.dooley@microchip.com, conor@kernel.org, jack@suse.cz, liam@infradead.org, ljs@kernel.org, mhocko@suse.com, paul.walmsley@sifive.com, peterx@redhat.com, robh@kernel.org, surenb@google.com, vbabka@kernel.org, yuanchu@google.com, stable@vger.kernel.org, pasha.tatashin@soleen.com, linux-mm@kvack.org, me@ziyao.cc References: <20261005134641.5801-1-lance.yang@linux.dev> From: "David Hildenbrand (Arm)" Content-Language: en-US Autocrypt: addr=david@kernel.org; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 10/5/26 15:46, Lance Yang wrote: > > On Mon, Oct 05, 2026 at 12:37:20PM +0200, David Hildenbrand (Arm) wrote: >> On 10/4/26 05:03, Lance Yang wrote: >>> RISC-V uses _PAGE_EXEC for swap soft-dirty tracking when >>> CONFIG_MEM_SOFT_DIRTY is enabled and Svrsw60t59b is available. That's >>> a problem for PMD migration entries, since pmd_present() also checks >>> _PAGE_LEAF (R/W/X) to recognize THPs with _PAGE_PRESENT temporarily >>> cleared during splitting. >> >> I'm curious: why do we have to set leaf indications for non-present things? The >> HW sure will ignore it, right? > > Yeah, that surprised me too :) Still wrapping my head around the details > ... > >> Is this a sw problem? Who needs that? > > IIUC, it's for software during a PMD split. > > __split_huge_pmd_locked() invalidates the huge PMD and flushes the TLB > before installing the PTE table. Software still needs pmd_present() and > pmd_trans_huge() to recognize the THP in between. > > RISC-V clears V but keeps the R/W/X bits for that, so the entry is invalid > to hardware but still identifiable as a THP by software. > > Hopefully I didn't miss something. I thought some change we performed to GUP-fast wouldn't require that anymore. But my memory is a bit vague ... :) > >>> >>> When a soft-dirty THP is migrated, set_pmd_migration_entry() preserves >>> soft-dirty with pmd_swp_mksoft_dirty(), setting the X bit in the >>> migration PMD. Even with _PAGE_PRESENT clear, we end up treating a >>> migration PMD as a present THP! The fault handler skips >>> pmd_migration_entry_wait(), and a write fault can end up in >>> do_huge_pmd_wp_page(), where pmd_page() decodes the migration entry >>> as a mapped PFN. >> >> That sounds bad. > [...] > YES, looks a bit off ... >> That reduces the effective swap size (and PFN we can store). Could that be a >> problem? > > We don't need all 52 bits of the swap offset. > > RV64 PFNs only need 44 bits for migration entries, and actual swap is > already limited to about 16 TiB per area with 4 KiB pages by > last_page (__u32) and swap_info_struct.max (unsigned int). > > So there's room to reserve a bit without reducing the supported swap > size or PFN range. > > CONFIG_MEM_SOFT_DIRTY is only available on RV64, so RV32 keeps its 20-bit > offset. Good, can you spell that out in the patch description? -- Cheers, David _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv