From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org,
Atish Patra <atishp@atishpatra.org>,
Conor Dooley <conor.dooley@microchip.com>
Cc: Atish Patra <atishp@rivosinc.com>,
linux-kernel@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <anup@brainfault.org>, Eric Lin <eric.lin@sifive.com>,
Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
Mark Rutland <mark.rutland@arm.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Will Deacon <will@kernel.org>
Subject: Re: [PATCH v4 07/14] RISC-V: KVM: Add skeleton support for perf
Date: Fri, 03 Feb 2023 08:08:42 +0000 [thread overview]
Message-ID: <71788DAC-4DDF-460F-B881-58729D6D437C@kernel.org> (raw)
In-Reply-To: <CAOnJCUKVXGXsFBUE753-HOr_CtN-5Nsq+yBQj1eT13WyU2r54g@mail.gmail.com>
On 3 February 2023 08:04:00 GMT, Atish Patra <atishp@atishpatra.org> wrote:
>On Thu, Feb 2, 2023 at 3:34 AM Conor Dooley <conor.dooley@microchip.com> wrote:
>>
>> On Wed, Feb 01, 2023 at 03:12:43PM -0800, Atish Patra wrote:
>> > This patch only adds barebone structure of perf implementation. Most of
>> > the function returns zero at this point and will be implemented
>> > fully in the future.
>> >
>> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
>> > +/* Per virtual pmu counter data */
>> > +struct kvm_pmc {
>> > + u8 idx;
>> > + struct perf_event *perf_event;
>> > + uint64_t counter_val;
>>
>> CI also complained that here, and elsewhere, you used uint64_t rather
>> than u64. Am I missing a reason for not using the regular types?
>>
>
>Nope. It was a simple oversight. I will fix it.
>Do you have a link to the CI report so that I can address them all in v5 ?
Try:
:%s/uint64_t/u64
It was just this patch, and checkpatch --strict should show it.
>
>> Thanks,
>> Conor.
>>
>> > + union sbi_pmu_ctr_info cinfo;
>> > + /* Event monitoring status */
>> > + bool started;
>
>
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-02-03 8:09 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-01 23:12 [PATCH v4 00/14] KVM perf support Atish Patra
2023-02-01 23:12 ` [PATCH v4 01/14] perf: RISC-V: Define helper functions expose hpm counter width and count Atish Patra
2023-02-02 14:59 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 02/14] perf: RISC-V: Improve privilege mode filtering for perf Atish Patra
2023-02-01 23:12 ` [PATCH v4 03/14] RISC-V: Improve SBI PMU extension related definitions Atish Patra
2023-02-02 4:00 ` Anup Patel
2023-02-02 15:01 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 04/14] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra
2023-02-02 15:14 ` Andrew Jones
2023-02-02 15:16 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 05/14] RISC-V: KVM: Return correct code for hsm stop function Atish Patra
2023-02-02 15:26 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 06/14] RISC-V: KVM: Modify SBI extension handler to return SBI error code Atish Patra
2023-02-02 4:01 ` Anup Patel
2023-02-02 8:52 ` Anup Patel
2023-02-02 15:56 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 07/14] RISC-V: KVM: Add skeleton support for perf Atish Patra
2023-02-02 4:02 ` Anup Patel
2023-02-02 11:33 ` Conor Dooley
2023-02-03 8:04 ` Atish Patra
2023-02-03 8:08 ` Conor Dooley [this message]
2023-02-02 17:03 ` Andrew Jones
2023-02-03 8:47 ` Atish Patra
2023-02-05 7:37 ` Atish Patra
2023-02-06 9:22 ` Andrew Jones
2023-02-06 11:39 ` Andrew Jones
2023-02-07 9:20 ` Atish Patra
2023-02-01 23:12 ` [PATCH v4 08/14] RISC-V: KVM: Add SBI PMU extension support Atish Patra
2023-02-02 7:52 ` Conor Dooley
2023-02-02 17:29 ` Andrew Jones
2023-02-03 9:07 ` Atish Patra
2023-02-01 23:12 ` [PATCH v4 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Atish Patra
2023-02-02 17:30 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 10/14] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode Atish Patra
2023-02-01 23:12 ` [PATCH v4 11/14] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra
2023-02-01 23:12 ` [PATCH v4 12/14] RISC-V: KVM: Implement perf support without sampling Atish Patra
2023-02-02 18:44 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 13/14] RISC-V: KVM: Support firmware events Atish Patra
2023-02-02 11:40 ` Conor Dooley
2023-02-03 10:14 ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 14/14] RISC-V: KVM: Increment firmware pmu events Atish Patra
2023-02-02 18:48 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=71788DAC-4DDF-460F-B881-58729D6D437C@kernel.org \
--to=conor@kernel.org \
--cc=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=atishp@rivosinc.com \
--cc=conor.dooley@microchip.com \
--cc=eric.lin@sifive.com \
--cc=guoren@kernel.org \
--cc=heiko@sntech.de \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox