From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF45DC36010 for ; Mon, 7 Apr 2025 16:28:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QLIxia6ZehQdYkjwngDqt5JI22GdqVJdTSl1IWmrzdA=; b=idn2zrPBD+RED5 dXgCWU59ntufqcHxdtfaIw3zhMadYSfmctsAhoMAAwY0MrgpNfUtBKgCGvCD/NVFywViBiQw+L9tu RB+r2plwVT/1GfmZEycoTso3mA0fuVlCgQGIVjFCffDr2jgofI/zHCxlTZWOui3JovFFYoqhJR7tz 6Wc9ja3wycmsDTgxT5fYUIqji5tUZhY5mtH9buljjQv+w3TurLXfy/sL2QURpDj6EBE/qt9iPdG8b 6S4NapZp6hxqtj/0zPytH67yakg6z+JEVb3Mit7v+e3dbC/9uYbEYivvLbjN1mvNsArdNmo41g5Hf D8QZhhgw91SHmAoHsDpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1pKK-00000001BAo-2bvW; Mon, 07 Apr 2025 16:28:00 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1nV5-00000000k5i-21o8 for linux-riscv@lists.infradead.org; Mon, 07 Apr 2025 14:31:00 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 3E4DA44133; Mon, 7 Apr 2025 14:30:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 20FFFC4CEDD; Mon, 7 Apr 2025 14:30:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744036258; bh=h4WeB3JR5XOOKfjJ1Wb1pS/jsomI9GdGY4EGispxTJc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=T+49vi1o6ayghjPS6kDvXpy0WVsKGfGkRI456Fq5kp/tlgjOhzpc10jQjzFGUGjej bb0K52Mund/e5TIkMPsX8jc12JEhoHWvMTRzpAjJQbfHZAyyM4pxlbJZAFn8Czva48 FOjWIKMOyg+AANEOJOR/Z1JeI5Tl73nMpR5DJtC9ik/yIvnB5I+vPWfmUzH8+vj5ff zT+jc45H18X0btcWINNL4r1qNv+sV2EoTxDbQ8dZa8DodW/Ek/ThIL6RgOqaIVaeBQ Rc7VAB0nB7F3PLj+rHLeAeJJh5C9i2LMObbNz0FWmZVHRljBU5WR8jHtttrLM4E4Cc RTyxiYEFItSqw== Message-ID: <71e2a14f-be36-4ec9-92a4-ec9301e925e8@kernel.org> Date: Mon, 7 Apr 2025 16:30:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/9] riscv: dts: andes: add QiLai SoC device tree To: Ben Zong-You Xie , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tglx@linutronix.de, daniel.lezcano@linaro.org, prabhakar.mahadev-lad.rj@bp.renesas.com, tim609@andestech.com References: <20250407104937.315783-1-ben717@andestech.com> <20250407104937.315783-8-ben717@andestech.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 07/04/2025 12:49, Ben Zong-You Xie wrote: > +/dts-v1/; > + > +#include > + > +/ { > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart0; This belongs to the board. > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + timebase-frequency = <62500000>; > + > + cpu0: cpu@0 { > + compatible = "andestech,ax45mp", "riscv"; > + device_type = "cpu"; > + status = "okay"; Drop. See DTS coding style. ... > + > + memory@400000000 { > + device_type = "memory"; > + reg = <0x4 0x00000000 0x4 0x00000000>; This belongs to the board usually. Are you sure your SoC has physically fixed memory? > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + plic: interrupt-controller@2000000 { > + compatible = "andestech,qilai-plic", "andestech,nceplic100"; > + #address-cells = <0>; > + #interrupt-cells = <2>; > + interrupt-controller; > + reg = <0x0 0x2000000 0x0 0x2000000>; > + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>, > + <&cpu1_intc 11>, <&cpu1_intc 9>, > + <&cpu2_intc 11>, <&cpu2_intc 9>, > + <&cpu3_intc 11>, <&cpu3_intc 9>; > + riscv,ndev = <71>; > + }; > + > + plic_sw: interrupt-controller@400000 { > + compatible = "andestech,qilai-plicsw", "andestech,plicsw"; > + reg = <0x0 0x400000 0x0 0x400000>; > + interrupts-extended = <&cpu0_intc 3>, > + <&cpu1_intc 3>, > + <&cpu2_intc 3>, > + <&cpu3_intc 3>; > + }; > + > + plmt: timer@100000 { Order the nodes, see DTS coding style. Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv