[GIT PULL] Initial clk/reset support for JH7110 for v6.4

* [GIT PULL] Initial clk/reset support for JH7110 for v6.4
@ 2023-04-05 16:05 Conor Dooley
  2023-04-05 18:56 ` Stephen Boyd
  0 siblings, 1 reply; 2+ messages in thread
From: Conor Dooley @ 2023-04-05 16:05 UTC (permalink / raw)
  To: sboyd, p.zabel
  Cc: linux-clk, linux-riscv, hal.feng, emil.renner.berthing, conor,
	mturquette

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Hey Stephen, (and Philipp if you want I guess?),

Here's a PR for the StarFive JH7110 clk/reset bits since I'd like to
take the DT this cycle & depend on the binding headers.

I've picked up R-B tags from Emil on all that patches, despite him being
listed as an author, as things have changed quite a lot since he was
involved in writing things many months ago.

The base here is -rc2 rather than -rc1 as -rc1 has issues booting on
this platform. Please pull and all that lark..

Cheers,
Conor.

The following changes since commit eeac8ede17557680855031c6f305ece2378af326:

  Linux 6.3-rc2 (2023-03-12 16:36:44 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-jh7110-clk-reset-for-6.4

for you to fetch changes up to 63a30e1f44d5e3afbb47efe8a15fd86feeb62b4b:

  MAINTAINERS: generalise StarFive clk/reset entries (2023-04-05 15:52:25 +0100)

----------------------------------------------------------------
Initial JH7110 clk/reset support

A rake of patches, initially worked on by Emil & later picked up by Hal
that add support for the sys/aon clock & reset controllers on StarFive's
JH7110 SoC.
This SoC is largely similar to the existing JH7100, so a bunch of
refactoring is done to share as many bits as possible between the two.
What's here (plus the already applied pinctrl bits) should be sufficient
to boot a basic initramfs.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Emil Renner Berthing (13):
      dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
      dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
      clk: starfive: Factor out common JH7100 and JH7110 code
      clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
      clk: starfive: Rename "jh7100" to "jh71x0" for the common code
      reset: Create subdirectory for StarFive drivers
      reset: starfive: Factor out common JH71X0 reset code
      reset: starfive: Extract the common JH71X0 reset code
      reset: starfive: Rename "jh7100" to "jh71x0" for the common code
      reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
      clk: starfive: Add StarFive JH7110 system clock driver
      clk: starfive: Add StarFive JH7110 always-on clock driver
      MAINTAINERS: generalise StarFive clk/reset entries

Hal Feng (3):
      clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
      reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
      reset: starfive: Add StarFive JH7110 reset driver

 .../bindings/clock/starfive,jh7110-aoncrg.yaml     | 107 +++
 .../bindings/clock/starfive,jh7110-syscrg.yaml     | 104 +++
 MAINTAINERS                                        |  22 +-
 drivers/clk/Makefile                               |   2 +-
 drivers/clk/starfive/Kconfig                       |  33 +-
 drivers/clk/starfive/Makefile                      |   6 +-
 drivers/clk/starfive/clk-starfive-jh7100-audio.c   |  74 +--
 drivers/clk/starfive/clk-starfive-jh7100.c         | 716 ++++++---------------
 drivers/clk/starfive/clk-starfive-jh7100.h         | 112 ----
 drivers/clk/starfive/clk-starfive-jh7110-aon.c     | 156 +++++
 drivers/clk/starfive/clk-starfive-jh7110-sys.c     | 490 ++++++++++++++
 drivers/clk/starfive/clk-starfive-jh7110.h         |  11 +
 drivers/clk/starfive/clk-starfive-jh71x0.c         | 333 ++++++++++
 drivers/clk/starfive/clk-starfive-jh71x0.h         | 123 ++++
 drivers/reset/Kconfig                              |   8 +-
 drivers/reset/Makefile                             |   2 +-
 drivers/reset/reset-starfive-jh7100.c              | 173 -----
 drivers/reset/starfive/Kconfig                     |  20 +
 drivers/reset/starfive/Makefile                    |   5 +
 drivers/reset/starfive/reset-starfive-jh7100.c     |  74 +++
 drivers/reset/starfive/reset-starfive-jh7110.c     |  70 ++
 drivers/reset/starfive/reset-starfive-jh71x0.c     | 131 ++++
 drivers/reset/starfive/reset-starfive-jh71x0.h     |  14 +
 include/dt-bindings/clock/starfive,jh7110-crg.h    | 221 +++++++
 include/dt-bindings/reset/starfive,jh7110-crg.h    | 154 +++++
 25 files changed, 2297 insertions(+), 864 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
 delete mode 100644 drivers/clk/starfive/clk-starfive-jh7100.h
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-aon.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-sys.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110.h
 create mode 100644 drivers/clk/starfive/clk-starfive-jh71x0.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh71x0.h
 delete mode 100644 drivers/reset/reset-starfive-jh7100.c
 create mode 100644 drivers/reset/starfive/Kconfig
 create mode 100644 drivers/reset/starfive/Makefile
 create mode 100644 drivers/reset/starfive/reset-starfive-jh7100.c
 create mode 100644 drivers/reset/starfive/reset-starfive-jh7110.c
 create mode 100644 drivers/reset/starfive/reset-starfive-jh71x0.c
 create mode 100644 drivers/reset/starfive/reset-starfive-jh71x0.h
 create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h
 create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h

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