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[62.151.111.63]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43009dfe5b3sm22487329f8f.39.2025.12.16.00.58.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Dec 2025 00:58:15 -0800 (PST) From: Javier Martinez Canillas To: Michael Opdenacker , Yixun Lan Cc: Dan Carpenter , Binbin Zhou , linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Michael Opdenacker Subject: Re: [PATCH 1/2] riscv: dts: spacemit: Add i2c buses on OrangePi RV2 In-Reply-To: <20251215-k1-boards-add-mmc-v1-1-d68dc87d4aab@rootcommit.com> References: <20251215-k1-boards-add-mmc-v1-0-d68dc87d4aab@rootcommit.com> <20251215-k1-boards-add-mmc-v1-1-d68dc87d4aab@rootcommit.com> Date: Tue, 16 Dec 2025 09:58:14 +0100 Message-ID: <87cy4els61.fsf@ocarina.mail-host-address-is-not-set> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: z6qvC4lJwghdwc0TCsD0K58zLbzK8snAaeO4mrIoA-k_1765875496 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251216_005951_362300_FA87A6E3 X-CRM114-Status: GOOD ( 13.59 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Michael Opdenacker writes: Hello Michael, > The OrangePi RV2 board exposes i2c2 and i2c8 buses > from the Spacemit K1 SoC. > > This declares devices present on such buses, in particular > the at24 eeprom to store MAC addresses and the regulators > attached to the PMIC on i2c8. > As Yao explained, there is still work needed to make the MMC work on K1 based boards. I also tried the same on my Milk-V Jupiter and found issues. I believe though that this patch has merits on its own and could land regardless of the MMC support. That's why I also posted a similar change for the Milk-V Jupiter board: https://lore.kernel.org/lkml/20251206134532.1741648-1-javierm@redhat.com/ My changes are identical to the Banana Pi BPI-F3 and I see yours too, so it seems all these boards are based on a K1 SoC reference design. > Signed-off-by: Michael Opdenacker > --- > arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 166 +++++++++++++++++++++++ > 1 file changed, 166 insertions(+) > Personally, I would split the changes in separate patches as I did on my series. But I guess it is also OK to have it as a single patch as you did: Reviewed-by: Javier Martinez Canillas -- Best regards, Javier Martinez Canillas Core Platforms Red Hat _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv