From: Nam Cao <namcao@linutronix.de>
To: "Charlie Jenkins" <thecharlesjenkins@gmail.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atish.patra@linux.dev>,
"Conor Dooley" <conor@kernel.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Shuah Khan" <shuah@kernel.org>,
"Radim Krčmář" <radim.krcmar@oss.qualcomm.com>,
"Jesse Taube" <jtaubepe@redhat.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-kselftest@vger.kernel.org,
Charlie Jenkins <thecharlesjenkins@gmail.com>
Subject: Re: [PATCH v3 03/17] riscv: kgdb: Use generated instruction headers
Date: Thu, 06 Aug 2026 09:09:50 +0200 [thread overview]
Message-ID: <87o6ffd8sh.fsf@yellow.woof> (raw)
In-Reply-To: <20260707-riscv_insn_table-v3-3-3f8e5f75ba97@gmail.com>
Charlie Jenkins <thecharlesjenkins@gmail.com> writes:
> +#define riscv_insn_branch(_insn, regs_ptr, _opcode, _pc, _comparison, type) \
> + ({ \
> + unsigned long _ret; \
> + if ((type)riscv_insn_reg_get_val( \
> + regs_ptr, \
> + riscv_insn_##_insn##_extract_xs1(_opcode)) \
> + _comparison(type) riscv_insn_reg_get_val( \
That _comparison(type) looks like _comparison is a function and type is
its argument.
Can we change to
_comparison (type)riscv_insn_reg_get_val(
to make it clearer?
> } else if (riscv_insn_is_c_beqz(op_code)) {
> - rs1_num = decode_register_index_short(op_code,
> - RVC_C1_RS1_OPOFF);
> - if (!rs1_num || regs_ptr[rs1_num] == 0)
> - *next_addr = RVC_EXTRACT_BTYPE_IMM(op_code) + pc;
> + rs1_num = riscv_insn_c_beqz_extract_xs1(op_code);
> + if (regs_ptr[8 + rs1_num] == 0)
> + *next_addr = riscv_insn_c_beqz_extract_imm(op_code) + pc;
Would it make sense to include the +8 part in riscv_insn_c_beqz_extract_xs1()?
Nam
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next prev parent reply other threads:[~2026-08-06 7:10 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 3:34 [PATCH v3 00/17] riscv: Generate riscv instruction functions Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 01/17] riscv: Introduce instruction table generation Charlie Jenkins
2026-08-05 11:32 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 02/17] riscv: alternatives: Use generated instruction headers for patching code Charlie Jenkins
2026-08-06 6:50 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 03/17] riscv: kgdb: Use generated instruction headers Charlie Jenkins
2026-08-06 7:09 ` Nam Cao [this message]
2026-07-08 3:34 ` [PATCH v3 04/17] riscv: Add kprobes instruction simulation KUnit Charlie Jenkins
2026-08-06 8:23 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 05/17] riscv: kprobes: Use generated instruction headers Charlie Jenkins
2026-08-06 8:30 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 06/17] riscv: cfi: " Charlie Jenkins
2026-08-06 8:30 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 07/17] riscv: Maintain epc on misaligned emulation error Charlie Jenkins
2026-08-06 8:38 ` Nam Cao
2026-08-06 16:36 ` Damien Le Moal
2026-07-08 3:34 ` [PATCH v3 08/17] riscv: Use generated instruction headers for misaligned loads/stores Charlie Jenkins
2026-08-06 14:45 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 09/17] riscv: kvm: Use generated instruction headers for csr code Charlie Jenkins
2026-08-06 15:04 ` Nam Cao
2026-07-08 3:34 ` [PATCH v3 10/17] KVM: device: Add test device Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 11/17] KVM: riscv: selftests: Add mmio test Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 12/17] riscv: kvm: Use generated instruction headers for mmio emulation Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 13/17] riscv: kvm: Add emulated test csr Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 14/17] KVM: riscv: selftests: Add csr emulation test Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 15/17] riscv: kvm: Use generated instruction headers for csr emulation Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 16/17] riscv: kexec: Use generated instruction headers for kexec relocations Charlie Jenkins
2026-07-08 3:34 ` [PATCH v3 17/17] riscv: Remove unused instruction headers Charlie Jenkins
2026-07-09 6:26 ` [syzbot ci] Re: riscv: Generate riscv instruction functions syzbot ci
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