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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1775547320; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ugVAhhp+ofRCMbbySKGlB6bhEOTipVQtotrRtOXHRh8=; b=h7a338o4vDqDEAYCeUaA6GfA32JNeWx2Xzwo1avvEbRbYuWJ3Qy9bvGj3z2/z9d7fDz9N9 6mDGxQ8Y6cfqSwAQ== To: Michael Neuling , patchwork-bot+linux-riscv@kernel.org Cc: linux-riscv@lists.infradead.org, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, ajones@ventanamicro.com, cleger@rivosinc.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/5] riscv: Cleanup and deduplicate unaligned access speed probe In-Reply-To: References: <177524102078.1406513.13713846519162509736.git-patchwork-notify@kernel.org> Date: Tue, 07 Apr 2026 09:35:19 +0200 Message-ID: <87wlyj4408.fsf@yellow.woof> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260407_003522_799096_A37CA0A8 X-CRM114-Status: GOOD ( 14.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Michael Neuling writes: >> This series was applied to riscv/linux.git (for-next) >> by Paul Walmsley : > >> Here is the summary with links: >> - [1/5] riscv: Clean up & optimize unaligned scalar access probe >> https://git.kernel.org/riscv/c/c202d70b2244 > > I think this is causing a regression (SHA1 actually 6455c6c11827) . > Fast unaligned accesses are no longer being set ever. > > Analysis from Claude (Opus 4.6) with Chris Masons kernel patch review skills: I should start using these AIs.. > -- > > diff --git a/arch/riscv/kernel/unaligned_access_speed.c > b/arch/riscv/kernel/unaligned_access_speed.c > > index b36a6a56f4..1f4c128d73 100644 > > --- a/arch/riscv/kernel/unaligned_access_speed.c > > +++ b/arch/riscv/kernel/unaligned_access_speed.c > > [ ... ] > > > -arch_initcall(check_unaligned_access_all_cpus); > > +late_initcall(check_unaligned_access_all_cpus); > > With this change, check_unaligned_access_all_cpus() now runs at > late_initcall (level 7), but lock_and_set_unaligned_access_static_branch() > remains at arch_initcall_sync (level 3s): ... > Does this mean fast_unaligned_access_speed_key is never enabled at boot, > even on hardware with fast unaligned access? The comment in > set_unaligned_access_static_branches() says "This will be called after > check_unaligned_access_all_cpus" which is no longer true with this > ordering change. Thanks, you are indeed right. This affects do_csum()'s performance. The below patch should resolve the issue. I will send a proper patch later today after I have tested with my hardware. Nam diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 485ab1d105d3..96ba80e6ea32 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -244,7 +244,7 @@ static int __init lock_and_set_unaligned_access_static_branch(void) return 0; } -arch_initcall_sync(lock_and_set_unaligned_access_static_branch); +late_initcall_sync(lock_and_set_unaligned_access_static_branch); static int riscv_online_cpu(unsigned int cpu) { _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv