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[62.151.111.63]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4324ea1af20sm58270346f8f.2.2025.12.29.02.14.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 02:14:22 -0800 (PST) From: Javier Martinez Canillas To: Chukun Pan , michael.opdenacker@rootcommit.com Cc: dan.carpenter@linaro.org, dlan@gentoo.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Chukun Pan Subject: Re: [PATCH 2/2] riscv: dts: spacemit: Add MMC support on BPI-F3 and OrangePi RV2 In-Reply-To: <20251224150003.1232791-1-amadeus@jmu.edu.cn> References: <20251215-k1-boards-add-mmc-v1-2-d68dc87d4aab@rootcommit.com> <20251224150003.1232791-1-amadeus@jmu.edu.cn> Date: Mon, 29 Dec 2025 11:14:21 +0100 Message-ID: <87zf71fvcy.fsf@ocarina.mail-host-address-is-not-set> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: p0vf0Aoh9E-k55tzErsXhI2ZwIUbw9ZikL0NzH5f6Gw_1767003264 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251229_021428_945244_8FF48565 X-CRM114-Status: GOOD ( 12.89 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Chukun Pan writes: > Hi, > >> +&sdhci0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&mmc1_cfg>; > > It would be better to arrange them in alphabetical order. > (Place pinctrl below no-sdio) > >> + bus-width = <4>; >> + cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_HIGH>; > > It seems that "cap-sd-highspeed" is missing? > >> + cd-inverted; >> + no-sdio; >> + status = "okay"; >> +}; > >> + sdhci0: mmc@d4280000 { > > An immature idea. Would naming nodes this way be better? > > sdmmc: mmc@d4280000 > sdio: mmc@d4280800 > emmc: mmc@d4281000 > > This seems to fit the description here better: > https://bianbu-linux.spacemit.com/en/device/peripheral_driver/SDHC/#dts-configuration > I initially thought something similar but it's not accurate. Because as explained in the doc that you referred: * slot1 supports SD/SDIO (1/4 bit) * slot2 supports SDIO/eMMC (1/4 bit) * slot3 supports only eMMC (1/4/8 bit) Which means that only slot3 is limited to eMMC. So even when a typical configuration is what you mentioned (and what I saw in most of the existing designs), slots 1 and 2 won't always be SD and SDIO. -- Best regards, Javier Martinez Canillas Core Platforms Red Hat _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv