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Sat, 26 Nov 2022 11:49:32 +0000 Date: Sat, 26 Nov 2022 11:49:23 +0000 Message-ID: <87zgceszp8.wl-maz@kernel.org> From: Marc Zyngier To: Conor Dooley Cc: Palmer Dabbelt , Anup Patel , Thomas Gleixner , Paul Walmsley , Albert Ou , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Conor Dooley Subject: Re: [PATCH v2 0/3] RISC-V interrupt controller select cleanup In-Reply-To: <20221118104300.85016-1-conor@kernel.org> References: <20221118104300.85016-1-conor@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: conor@kernel.org, palmer@dabbelt.com, anup@brainfault.org, tglx@linutronix.de, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, conor.dooley@microchip.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221126_034937_549506_B5870C8D X-CRM114-Status: GOOD ( 22.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 18 Nov 2022 10:42:58 +0000, Conor Dooley wrote: > > From: Conor Dooley > > Hey Marc, Anup, Palmer, > > Submitted a patch yesterday defaulting the SiFive PLIC driver to > enabled [0], and in the ensuing conversation Marc suggested just doing a > select at the arch level and dropping the user selectability completely. > > Since we're already selecting SIFIVE_PLIC in Kconfig.socs for all of the > supported SoCs & selecting RISCV_INTC in the arch Kconfig itself, > patches 1 & 2 can go via the irqchip tree without any impact. > > @Anup, by the same logic - I think we can also enable the AIA stuff via > selects at the arch level? Dumping as much from Kconfig.socs as possible > is the plan, so adding them there for SOC_VIRT kinda goes contrary to > that. > > I spoke with Palmer today about putting my various bits of Kconfig.socs > cleanup on a branch, so I'll take patch 3. It's only in this series as > it is related work, rather due to any sort of dependency between the > patches. > > Thanks, > Conor. > > [0] https://lore.kernel.org/linux-riscv/86wn7tnx9a.wl-maz@kernel.org/ > > Conor Dooley (3): > irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC > irqchip/riscv-intc: remove user selectability of RISCV_INTC > RISC-V: stop selecting SIFIVE_PLIC at the SoC level > > arch/riscv/Kconfig | 1 + > arch/riscv/Kconfig.socs | 5 ----- > drivers/irqchip/Kconfig | 21 ++------------------- > 3 files changed, 3 insertions(+), 24 deletions(-) For the series: Acked-by: Marc Zyngier Please take the whole thing via the RISC-V tree. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv