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[75.72.117.212]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-50ae997ea9fsm4538196173.17.2025.08.14.05.30.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Aug 2025 05:30:54 -0700 (PDT) Message-ID: <8f7bac84-623b-47dc-bc58-dc0013a85877@riscstar.com> Date: Thu, 14 Aug 2025 07:30:52 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY To: Yao Zi , robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, bhelgaas@google.com, vkoul@kernel.org, kishon@kernel.org Cc: dlan@gentoo.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, p.zabel@pengutronix.de, tglx@linutronix.de, johan+linaro@kernel.org, thippeswamy.havalige@amd.com, namcao@linutronix.de, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, inochiama@gmail.com, quic_schintav@quicinc.com, fan.ni@samsung.com, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, linux-pci@vger.kernel.org, spacemit@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250813184701.2444372-1-elder@riscstar.com> <20250813184701.2444372-2-elder@riscstar.com> Content-Language: en-US From: Alex Elder In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250814_053056_443558_811E4C1C X-CRM114-Status: GOOD ( 22.55 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 8/13/25 9:52 PM, Yao Zi wrote: > On Wed, Aug 13, 2025 at 01:46:55PM -0500, Alex Elder wrote: >> Add the Device Tree binding for the PCIe/USB 3.0 combo PHY found in >> the SpacemiT K1 SoC. This is one of three PCIe PHYs, and is unusual >> in that only the combo PHY can perform a calibration step needed to >> determine settings used by the other two PCIe PHYs. >> >> Calibration must be done with the combo PHY in PCIe mode, and to allow >> this to occur independent of the eventual use for the PHY (PCIe or USB) >> some PCIe-related properties must be supplied: clocks; resets; and a >> syscon phandle. >> >> Signed-off-by: Alex Elder >> --- >> .../bindings/phy/spacemit,k1-combo-phy.yaml | 110 ++++++++++++++++++ >> 1 file changed, 110 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml >> new file mode 100644 >> index 0000000000000..ed78083a53231 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml > > ... > >> + spacemit,syscon-pmu: >> + description: >> + PHandle that refers to the APMU system controller, whose >> + regmap is used in setting the mode >> + $ref: /schemas/types.yaml#/definitions/phandle > > Clock controllers and ethernet controllers all use spacemit,apmu to > refer the APMU system controller. Do you think it's better to keep them > aligned? I do think it's better to keep them aligned. And I appreciate your noticing this. I don't see anything that's accepted upstream that defines properties like this, but I now see this: https://lore.kernel.org/lkml/20250812-net-k1-emac-v5-2-dd17c4905f49@iscas.ac.cn/ I did a quick scan for what others do when a property's value is a phandle, and other than just "syscon" it seems that word is omitted. So unless someone else suggests otherwise, I'll use "spacemit,apmu" for this property in my next version. > ... > >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include >> + combo_phy: phy@c0b10000 { > > This label is unnecessary. OK. I used it when testing USB but we can add the label back when that driver gets reviewed. >> + compatible = "spacemit,k1-combo-phy"; >> + reg = <0xc0b10000 0x1000>; >> + clocks = <&syscon_apmu CLK_PCIE0_DBI>, >> + <&syscon_apmu CLK_PCIE0_MASTER>, >> + <&syscon_apmu CLK_PCIE0_SLAVE>; >> + clock-names = "dbi", >> + "mstr", >> + "slv"; >> + resets = <&syscon_apmu RESET_PCIE0_DBI>, >> + <&syscon_apmu RESET_PCIE0_MASTER>, >> + <&syscon_apmu RESET_PCIE0_SLAVE>, >> + <&syscon_apmu RESET_PCIE0_GLOBAL>; >> + reset-names = "dbi", >> + "mstr", >> + "slv", >> + "global"; >> + spacemit,syscon-pmu = <&syscon_apmu>; >> + #phy-cells = <1>; >> + status = "disabled"; >> + }; > > Best regards, > Yao Zi Thanks a lot. -Alex _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv