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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmq5L-0000000GL4q-2TOD; Tue, 25 Feb 2025 08:14:35 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmq3b-0000000GKqi-3ixn for linux-riscv@lists.infradead.org; Tue, 25 Feb 2025 08:12:49 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 3BC765C0DB1; Tue, 25 Feb 2025 08:12:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0B5CC4CEDD; Tue, 25 Feb 2025 08:12:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740471166; bh=oioRiYJ4Vklv26htgRct3bcjim0IxVAPfn5+RAjq134=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=JAx80sKmURHXMO/iKSZ8noI01xNOTfd6lFxs9HTKtARO63J8IVtkQ7sYCKoFmXxy3 0r8Y0Tu8L26Ira5juZEj3BHwDyvS9zsAkxI7R8Oo3sZQrIVvgwstyRDJOK13WBJxK0 6J1X5MKUxxhnMMVtDNWvSwcWWroQceQO/U69IwlCSsoteqjbHZ3bKISFFVpJ+14uuN pTVayOtn09tbBoeV6YPwiEFJd/SR/OmXKXK6WGpei8aAuPxTHd8OWfQKomJRDaW+zj jWzbsutYT5znbD3weF74k/d2HtwQop/veq9IqXtKzi1OSnup4tLShBxQksVOHzUh6E KiFbjtVBnkt/w== Message-ID: <976a2029-c0c0-4093-a3cd-71e1524db032@kernel.org> Date: Tue, 25 Feb 2025 09:12:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/4] dt-bindings: soc: spacemit: Add spacemit,k1-syscon To: Haylen Chu , Alex Elder Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Haylen Chu , Yixun Lan , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Inochi Amaoto , Chen Wang , Jisheng Zhang , Meng Zhang , Guodong Xu References: <19e5129b-8423-4660-8e4f-8b898214d275@kernel.org> <2ab715bd-e26c-41bb-ac64-baa864d90414@kernel.org> <7c697e9a-d6d9-4672-9738-93ce3a71beb6@riscstar.com> <4f7bf109-bf18-42be-971c-5d5edd9595b5@kernel.org> <6ea8ac17-42c8-46fa-b970-77ba89de66c4@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 24/02/2025 11:17, Haylen Chu wrote: > On Sat, Feb 22, 2025 at 12:50:13PM +0100, Krzysztof Kozlowski wrote: >> On 22/02/2025 11:48, Haylen Chu wrote: >>> On Sat, Feb 22, 2025 at 10:59:09AM +0100, Krzysztof Kozlowski wrote: >>>> On 22/02/2025 00:40, Alex Elder wrote: >>>>> I have a general proposal on how to represent this, but I'd >>>>> like to know whether it makes sense. It might be what Krzysztof >>>>> is suggesting, but in any case, I hope this representation would >>>>> work, because it could simplify the code, and compartmentalizes >>>>> things. >>>>> >>>>> Part of what motivates this is that I've been looking at the >>>>> downstream reset code this week. It contains a large number of >>>>> register offset definitions identical to what's used for the >>>>> clock driver. The reset driver uses exactly the same registers >>>>> as the clock driver does. Downstream they are separate drivers, >>>>> but the clock driver exports a shared spinlock for both drivers >>>>> to use. >>>>> >>>>> These really need to be incorporated into the same driver for >>>>> upstream. >>>> >>>> Why? First, it is not related to the topic here at all. You can design >>>> drivers as you wish and still nothing to do with discussion about binding. >>>> Second, different subsystems justify different drivers and Linux handles >>>> this well already. No need for custom spinlock - regmap already does it. >>>> >>>> >>>>> >>>>> The clock code defines four distinct "units" (a term I'll use >>>>> from here on; there might be a better name): >>>>> MPMU Main Power Management Unit >>>>> APMU Application Power Management Unit >>>>> APBC APB Clock >>>>> APBS APB Spare >>>>> >>>>> The reset code defines some of those, but doesn't use APBS. >>>>> It also defines three more: >>>>> APBC2 Another APB Clock >>>>> RCPU Real-time CPU? >>>>> RCPU2 Another Real-time CPU >>>>> >>>>> Each of these "units" has a distinct I/O memory region that >>>>> contains registers that manage the clocks and reset signals. >>>> >>>> So there are children - mpmu, apmu, apbclock, apbspare, apbclock2, rcpu >>>> 1+2? But previous statements were saying these are intermixed? >>>> >>>> " I'll make APMU/MPMU act as a whole device" >>> >>> My reply seems somehow misleading. The statement means I will merge the >>> children with the syscon into one devicetree node, which applies for >>> both APMU and MPMU. I wasn't going to say that APMU and MPMU are >>> intermixed. >>> >>> As Alex said, all these units have their own distinct and separate MMIO >>> regions. >>> >>>>> >>>>> I suggest a single "k1-clocks" device be created, which has >>>> >>>> For four devices? Or for one device? >>> >>> By Alex's example, I think he means a device node taking all these >>> distinct MMIO regions as resource. >> >> >> You still do not answer about the hardware: how many devices is there? > > In my understanding, the series covers four devices, APBC, APMU, MPMU > and APBS, each comes with its separate MMIO region and is clearly > described in the datasheet. I stated this in the later part of the > reply, Ack > >>> For APBC, MPMU, APBS and APMU, I'm pretty >>> sure they're standalone blocks with distinct and separate MMIO regions, >>> this could be confirmed by the address mapping[1]. > > Thus I don't agree on Alex's solution, since it creates fake devices not > mentioned by the datasheet (spacemit,k1-clocks and all its children in > the example devicetree). Ack > >>> >>> clock { >>> compatible = "spacemit,k1-clocks"; >>> >>> reg = <0x0 0xc0880000 0x0 0x2050>, >>> <0x0 0xc0888000 0x0 0x30>, >>> <0x0 0xd4015000 0x0 0x1000>, >>> <0x0 0xd4050000 0x0 0x209c>, >>> <0x0 0xd4090000 0x0 0x1000>, >>> <0x0 0xd4282800 0x0 0x400>, >>> <0x0 0xf0610000 0x0 0x20>; >>> reg-names = "rcpu", >>> "rcpu2", >>> "apbc", >>> "mpmu", >>> "apbs", >>> "apmu", >>> "apbc2"; >>> >>> /* ... */ >>> }; >>> >>>> No, it's again going to wrong direction. I already said: >>>> >>>> "You need to define what is the device here. Don't create fake nodes ust >>>> for your drivers. If registers are interleaved and manual says "this is >>>> block APMU/MPMU" then you have one device, so one node with 'reg'." >>>> >>>> So what is the device here? Can you people actually answer? >>>> >>> >>> I'm not sure about the apbc2, rcpu and rcpu2 regions; they aren't >>> related to the thread, either. For APBC, MPMU, APBS and APMU, I'm pretty >>> sure they're standalone blocks with distinct and separate MMIO regions, >>> this could be confirmed by the address mapping[1]. >> >> They were brought here to discuss for some reason. Long discussions, >> long emails, unrelated topics like hardware or different devices - all >> this is not making it easier for me to understand. >> >> Best regards, >> Krzysztof > > By the way, I made a summary on the hardware covered by this series in > one of my earlier reply[1]. Could you please comment further on my > proposal[2] according it, or pointing out anything that's unclear or > missing? It will be helpful for things to improve. Thanks, it looks good. Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv